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[11/19] sunxi: sun6i: make more clock functions SPL only

Message ID 20240103001239.17482-12-andre.przywara@arm.com
State Accepted
Commit 58bf08999962f27d8dbdd3ae3171b2ab59358b9c
Delegated to: Andre Przywara
Headers show
Series sunxi: SPL cleanup part 1 | expand

Commit Message

Andre Przywara Jan. 3, 2024, 12:12 a.m. UTC 
In clock_sun6i.c, responsible for (mostly early) clock setup on older
generation Allwinner SoCs, many functions are only needed by the SPL,
and are thus already guarded by CONFIG_SPL_BUILD.

Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.

This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only.

This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/mach-sunxi/clock_sun6i.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
index aad9df282ec..59f7e15ffe8 100644
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
@@ -62,7 +62,6 @@  void clock_init_safe(void)
 	setbits_le32(&ccm->sata_clk_cfg, CCM_SATA_CTRL_ENABLE);
 #endif
 }
-#endif /* CONFIG_SPL_BUILD */
 
 void clock_init_sec(void)
 {
@@ -124,7 +123,6 @@  void clock_init_uart(void)
 #endif
 }
 
-#ifdef CONFIG_SPL_BUILD
 void clock_set_pll1(unsigned int clk)
 {
 	struct sunxi_ccm_reg * const ccm =
@@ -173,6 +171,7 @@  void clock_set_pll1(unsigned int clk)
 }
 #endif /* CONFIG_SPL_BUILD */
 
+/* video, DRAM, PLL_PERIPH clocks */
 void clock_set_pll3(unsigned int clk)
 {
 	struct sunxi_ccm_reg * const ccm =