diff mbox series

ddr: imx: Handle 3734 in addition to 3733 and 3732 MTps rates

Message ID 20231202014826.212858-1-marex@denx.de
State Accepted
Commit 88db55b054768238ac48170d684303123733d709
Delegated to: Fabio Estevam
Headers show
Series ddr: imx: Handle 3734 in addition to 3733 and 3732 MTps rates | expand

Commit Message

Marek Vasut Dec. 2, 2023, 1:48 a.m. UTC 
The new MX8M DDR tool 3.31 now generates a programming file which uses
data rate 3734 instead of 3733 or 3732 . Handle another rounding option .

Signed-off-by: Marek Vasut <marex@denx.de>
---
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jacky Bai <ping.bai@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: u-boot@lists.denx.de
---
 drivers/ddr/imx/phy/ddrphy_utils.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Fabio Estevam Dec. 2, 2023, 2:27 a.m. UTC | #1 
On Fri, Dec 1, 2023 at 10:48 PM Marek Vasut <marex@denx.de> wrote:
>
> The new MX8M DDR tool 3.31 now generates a programming file which uses
> data rate 3734 instead of 3733 or 3732 . Handle another rounding option .
>
> Signed-off-by: Marek Vasut <marex@denx.de>

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam Dec. 15, 2023, 1:17 a.m. UTC | #2 
On Fri, Dec 1, 2023 at 10:48 PM Marek Vasut <marex@denx.de> wrote:
>
> The new MX8M DDR tool 3.31 now generates a programming file which uses
> data rate 3734 instead of 3733 or 3732 . Handle another rounding option .
>
> Signed-off-by: Marek Vasut <marex@denx.de>

Applied to u-boot-imx master, thanks.
diff mbox series

Patch

diff --git a/drivers/ddr/imx/phy/ddrphy_utils.c b/drivers/ddr/imx/phy/ddrphy_utils.c
index fd8b4113b7b..d5dac0fce92 100644
--- a/drivers/ddr/imx/phy/ddrphy_utils.c
+++ b/drivers/ddr/imx/phy/ddrphy_utils.c
@@ -111,6 +111,7 @@  void ddrphy_init_set_dfi_clk(unsigned int drate)
 		dram_pll_init(MHZ(1000));
 		dram_disable_bypass();
 		break;
+	case 3734:
 	case 3733:
 	case 3732:
 		dram_pll_init(MHZ(933));