From patchwork Tue Oct 31 13:28:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nitin Yadav X-Patchwork-Id: 1857574 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=mztR4C0K; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4SKWFK5wVgz1yQ4 for ; Wed, 1 Nov 2023 00:29:09 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id EDE0787CCC; Tue, 31 Oct 2023 14:28:24 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="mztR4C0K"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id DF8E387AB8; Tue, 31 Oct 2023 14:28:21 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id EA1AB87B53 for ; Tue, 31 Oct 2023 14:28:16 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=n-yadav@ti.com Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 39VDSEJ0094047; Tue, 31 Oct 2023 08:28:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1698758894; bh=Ms54gVJghUeN9zRmaXtJHfw9/lIHaMP+Wtqz/vExRxQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=mztR4C0KQalbCQ7tAiToscxRqLt+K8rnPBIpwOLJo6M3yJ279avIzFM4vrMUcDkhW +w3kCmn7Qi0pFJUKCl4yF1HtgMNWwMmAsjOvK2upGbr96xC5MnbEjqc6uoCrAzzyGo wVtdSO9iRuNR76fE2a2cnB9wTJSalG+p0pYCdj6g= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 39VDSD5g007460 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 31 Oct 2023 08:28:13 -0500 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 31 Oct 2023 08:28:13 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 31 Oct 2023 08:28:14 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 39VDSCoH030401; Tue, 31 Oct 2023 08:28:13 -0500 From: Nitin Yadav To: , CC: Subject: [PATCH 2/6] ram: k3-ddrss: k3-ddrss: Fix updating ddr size with ecc off Date: Tue, 31 Oct 2023 18:58:05 +0530 Message-ID: <20231031132809.1524341-3-n-yadav@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231031132809.1524341-1-n-yadav@ti.com> References: <20231031132809.1524341-1-n-yadav@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean When DDR ECC is off (ecc_reserved_space = 0) k3_ddrss_ddr_fdt_fixup() doesn't update the DDR size in the memory node of DT. Fix this by dropping check for ecc_reserved_space to be non zero. This allows R5 SPL to fixup A53 SPL DT with right DDR size as discovered during DDR init or based on R5 SPL DT input. Signed-off-by: Vignesh Raghavendra Signed-off-by: Nitin Yadav --- drivers/ram/k3-ddrss/k3-ddrss.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/ram/k3-ddrss/k3-ddrss.c b/drivers/ram/k3-ddrss/k3-ddrss.c index b54557f02c..28129d52a6 100644 --- a/drivers/ram/k3-ddrss/k3-ddrss.c +++ b/drivers/ram/k3-ddrss/k3-ddrss.c @@ -664,9 +664,6 @@ int k3_ddrss_ddr_fdt_fixup(struct udevice *dev, void *blob, struct bd_info *bd) u64 size[CONFIG_NR_DRAM_BANKS]; int bank; - if (ddrss->ecc_reserved_space == 0) - return 0; - for (bank = CONFIG_NR_DRAM_BANKS - 1; bank >= 0; bank--) { if (ddrss->ecc_reserved_space > bd->bi_dram[bank].size) { ddrss->ecc_reserved_space -= bd->bi_dram[bank].size;