diff mbox series

arm64: versal-net: enable CONFIG_MMC_SDHCI_ADMA

Message ID 20231027030446.4009-1-venkatesh.abbarapu@amd.com
State Accepted
Commit 83cab0b30fcb893a249d6644dd4e7cbe429e6750
Delegated to: Michal Simek
Headers show
Series arm64: versal-net: enable CONFIG_MMC_SDHCI_ADMA | expand

Commit Message

Abbarapu, Venkatesh Oct. 27, 2023, 3:04 a.m. UTC
The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit
widths of DMA. This significantly improves read and write throughput.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
---
 configs/xilinx_versal_net_virt_defconfig | 1 +
 1 file changed, 1 insertion(+)

Comments

Michal Simek Nov. 6, 2023, 12:43 p.m. UTC | #1
On 10/27/23 05:04, Venkatesh Yadav Abbarapu wrote:
> The Standard Host Controller Interface (SDHCI) specification version
> 3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit
> widths of DMA. This significantly improves read and write throughput.
> 
> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
> ---
>   configs/xilinx_versal_net_virt_defconfig | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig
> index ccc9431ca8..0553ac6b17 100644
> --- a/configs/xilinx_versal_net_virt_defconfig
> +++ b/configs/xilinx_versal_net_virt_defconfig
> @@ -85,6 +85,7 @@ CONFIG_MMC_IO_VOLTAGE=y
>   CONFIG_MMC_UHS_SUPPORT=y
>   CONFIG_MMC_HS400_SUPPORT=y
>   CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_ADMA=y
>   CONFIG_MMC_SDHCI_ZYNQ=y
>   CONFIG_ZYNQ_SDHCI_MIN_FREQ=100000
>   CONFIG_MTD=y

Applied.
M
diff mbox series

Patch

diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig
index ccc9431ca8..0553ac6b17 100644
--- a/configs/xilinx_versal_net_virt_defconfig
+++ b/configs/xilinx_versal_net_virt_defconfig
@@ -85,6 +85,7 @@  CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_ZYNQ_SDHCI_MIN_FREQ=100000
 CONFIG_MTD=y