From patchwork Mon Oct 16 09:25:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Barker X-Patchwork-Id: 1849256 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4S8Bpj5XPbz1ypX for ; Mon, 16 Oct 2023 20:37:17 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id DB1F086F8B; Mon, 16 Oct 2023 11:27:31 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=bp.renesas.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 6BA8086484; Mon, 16 Oct 2023 11:27:23 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by phobos.denx.de (Postfix) with ESMTP id F356E868AE for ; Mon, 16 Oct 2023 11:27:01 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=bp.renesas.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=paul.barker.ct@bp.renesas.com X-IronPort-AV: E=Sophos;i="6.03,228,1694703600"; d="scan'208";a="183211995" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 16 Oct 2023 18:27:00 +0900 Received: from GBR-5CG2373LKG.adwin.renesas.com (unknown [10.226.93.82]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 4151E41F99C3; Mon, 16 Oct 2023 18:26:57 +0900 (JST) From: Paul Barker To: u-boot@lists.denx.de, Marek Vasut , Nobuhiro Iwamatsu , Hai Pham Cc: Paul Barker , Biju Das , Lad Prabhakar Subject: [PATCH v3 21/21] board: rzg2l: Add RZ/G2L SMARC EVK board Date: Mon, 16 Oct 2023 10:25:43 +0100 Message-Id: <20231016092543.3833-22-paul.barker.ct@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231016092543.3833-1-paul.barker.ct@bp.renesas.com> References: <20231016092543.3833-1-paul.barker.ct@bp.renesas.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The Renesas RZ/G2L SMARC Evaluation Board Kit consists of the RZ/G2L System-on-Module (SOM) based on the R9A07G044L2 SoC, and a common SMARC carrier board. The ARM TrustedFirmware code for the Renesas RZ/G2L SoC family passes a devicetree blob to the bootloader as an argument in the same was previous R-Car gen3/gen4 SoCs. This blob contains a compatible string which can be used to identify the particular SoC we are running on and this is used to select the appropriate device tree to load. The configuration renesas_rzg2l_smarc_defconfig is added to support building for this target. In the future this defconfig will be extended to support other SoCs and evaluation boards from the RZ/G2L family. Signed-off-by: Paul Barker Reviewed-by: Biju Das Reviewed-by: Lad Prabhakar Reviewed-by: Marek Vasut --- v2->v3: * Move memmap-rzg2l.c changes to an earlier patch. * Drop __weak attributes on board_init() & reset_cpu(). v1->v2: * Move dram_init() & dram_init_banksize() to memmap-rzg2l.c * Add a TODO note for reset support. arch/arm/mach-rmobile/Kconfig.rzg2l | 14 ++++++ board/renesas/rzg2l/Kconfig | 18 +++++++ board/renesas/rzg2l/MAINTAINERS | 6 +++ board/renesas/rzg2l/Makefile | 4 ++ board/renesas/rzg2l/rzg2l.c | 67 +++++++++++++++++++++++++++ configs/renesas_rzg2l_smarc_defconfig | 52 +++++++++++++++++++++ include/configs/rzg2l-smarc.h | 14 ++++++ 7 files changed, 175 insertions(+) create mode 100644 board/renesas/rzg2l/Kconfig create mode 100644 board/renesas/rzg2l/MAINTAINERS create mode 100644 board/renesas/rzg2l/Makefile create mode 100644 board/renesas/rzg2l/rzg2l.c create mode 100644 configs/renesas_rzg2l_smarc_defconfig create mode 100644 include/configs/rzg2l-smarc.h diff --git a/arch/arm/mach-rmobile/Kconfig.rzg2l b/arch/arm/mach-rmobile/Kconfig.rzg2l index 039d6b0a45aa..dc30bdf3e5c2 100644 --- a/arch/arm/mach-rmobile/Kconfig.rzg2l +++ b/arch/arm/mach-rmobile/Kconfig.rzg2l @@ -9,6 +9,20 @@ config R9A07G044L help Enable support for the Renesas R9A07G044L (RZ/G2L) SoC. +choice + prompt "Renesas RZ/G2L Family Board selection" + default TARGET_RZG2L_SMARC_EVK + +config TARGET_RZG2L_SMARC_EVK + bool "Renesas RZ/G2L SMARC EVK" + imply R9A07G044L + help + Enable support for the RZ/G2L SMARC evaluation board. + +source "board/renesas/rzg2l/Kconfig" + +endchoice + config MULTI_DTB_FIT_UNCOMPRESS_SZ default 0x80000 if TARGET_RZG2L_SMARC_EVK diff --git a/board/renesas/rzg2l/Kconfig b/board/renesas/rzg2l/Kconfig new file mode 100644 index 000000000000..1335fc7ae806 --- /dev/null +++ b/board/renesas/rzg2l/Kconfig @@ -0,0 +1,18 @@ +# Copyright (C) 2023 Renesas Electronics Corporation +# SPDX-License-Identifier: GPL-2.0+ + +if TARGET_RZG2L_SMARC_EVK + +config SYS_SOC + default "rmobile" + +config SYS_BOARD + default "rzg2l" + +config SYS_VENDOR + default "renesas" + +config SYS_CONFIG_NAME + default "rzg2l-smarc" + +endif diff --git a/board/renesas/rzg2l/MAINTAINERS b/board/renesas/rzg2l/MAINTAINERS new file mode 100644 index 000000000000..0a51391c1fc9 --- /dev/null +++ b/board/renesas/rzg2l/MAINTAINERS @@ -0,0 +1,6 @@ +RENESAS RZG2L BOARD FAMILY +M: Paul Barker +S: Supported +F: arch/arm/dts/rz-smarc-common.dtsi +N: rzg2l +N: r9a07g044 diff --git a/board/renesas/rzg2l/Makefile b/board/renesas/rzg2l/Makefile new file mode 100644 index 000000000000..466935fc8158 --- /dev/null +++ b/board/renesas/rzg2l/Makefile @@ -0,0 +1,4 @@ +# Copyright (C) 2023 Renesas Electronics Corporation +# SPDX-License-Identifier: GPL-2.0+ + +obj-y := rzg2l.o diff --git a/board/renesas/rzg2l/rzg2l.c b/board/renesas/rzg2l/rzg2l.c new file mode 100644 index 000000000000..755747e665cb --- /dev/null +++ b/board/renesas/rzg2l/rzg2l.c @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * RZ/G2L board support. + * Copyright (C) 2023 Renesas Electronics Corporation + */ + +#include +#include +#include + +#if IS_ENABLED(CONFIG_MULTI_DTB_FIT) +/* If the firmware passed a device tree, use it for board identification. */ +extern u64 rcar_atf_boot_args[]; + +static bool is_rzg2l_board(const char *board_name) +{ + void *atf_fdt_blob = (void *)(rcar_atf_boot_args[1]); + + return fdt_node_check_compatible(atf_fdt_blob, 0, board_name) == 0; +} + +int board_fit_config_name_match(const char *name) +{ + void *atf_fdt_blob = (void *)(rcar_atf_boot_args[1]); + + if (fdt_magic(atf_fdt_blob) != FDT_MAGIC) + return -1; + + if (is_rzg2l_board("renesas,r9a07g044l2")) + return strcmp(name, "r9a07g044l2-smarc"); + + return -1; +} +#endif + +static void apply_atf_overlay(void *fdt_blob) +{ + void *atf_fdt_blob = (void *)(rcar_atf_boot_args[1]); + + if (fdt_magic(atf_fdt_blob) == FDT_MAGIC) + fdt_overlay_apply_node(fdt_blob, 0, atf_fdt_blob, 0); +} + +int fdtdec_board_setup(const void *fdt_blob) +{ + apply_atf_overlay((void *)fdt_blob); + + return 0; +} + +int ft_board_setup(void *blob, struct bd_info *bd) +{ + return 0; +} + +int board_init(void) +{ + return 0; +} + +void reset_cpu(void) +{ + /* + * TODO: Implement reset support once TrustedFirmware supports + * the appropriate call. + */ +} diff --git a/configs/renesas_rzg2l_smarc_defconfig b/configs/renesas_rzg2l_smarc_defconfig new file mode 100644 index 000000000000..e17d22695787 --- /dev/null +++ b/configs/renesas_rzg2l_smarc_defconfig @@ -0,0 +1,52 @@ +CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=16666666 +CONFIG_SYS_INIT_SP_BSS_OFFSET=1048576 +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_RMOBILE=y +CONFIG_TEXT_BASE=0x50000000 +CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_SYS_MALLOC_F_LEN=0x80000 +CONFIG_ENV_SIZE=0x20000 +CONFIG_ENV_OFFSET=0xFFFE0000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r9a07g044l2-smarc" +CONFIG_RZG2L=y +CONFIG_SYS_MONITOR_LEN=1048576 +CONFIG_SYS_LOAD_ADDR=0x58000000 +CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_USE_BOOTARGS=y +# CONFIG_BOARD_EARLY_INIT_F is not set +CONFIG_SYS_MALLOC_BOOTPARAMS=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2068 +CONFIG_CMD_CLK=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_MULTI_DTB_FIT_LZO=y +CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_PART=2 +CONFIG_VERSION_VARIABLE=y +CONFIG_REGMAP=y +CONFIG_CLK=y +CONFIG_CLK_RENESAS=y +# CONFIG_CLK_RCAR_GEN3 is not set +CONFIG_GPIO_HOG=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y diff --git a/include/configs/rzg2l-smarc.h b/include/configs/rzg2l-smarc.h new file mode 100644 index 000000000000..ea57d280cb8d --- /dev/null +++ b/include/configs/rzg2l-smarc.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2023 Renesas Electronics Corporation + */ + +#ifndef __RENESAS_RZG2L_H +#define __RENESAS_RZG2L_H + +#include + +/* console */ +#define CFG_SYS_BAUDRATE_TABLE { 115200, 38400 } + +#endif /* __RENESAS_RZG2L_H */