diff mbox series

[v3,2/6] arm: mach-tegra: enable sysreset driver

Message ID 20231003064042.43201-3-clamor95@gmail.com
State Superseded
Delegated to: Thierry Reding
Headers show
Series Implement proper sysreset ability for Tegra SoCs and some PMICs | expand

Commit Message

Svyatoslav Ryhel Oct. 3, 2023, 6:40 a.m. UTC 
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 arch/arm/mach-tegra/Kconfig | 3 +++
 arch/arm/mach-tegra/pmc.c   | 9 ---------
 2 files changed, 3 insertions(+), 9 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 464bd0798f..453f94bcf2 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -61,6 +61,9 @@  config TEGRA_COMMON
 	select MISC
 	select OF_CONTROL
 	select SPI
+	select SYSRESET
+	select SPL_SYSRESET
+	select SYSRESET_TEGRA
 	imply CMD_DM
 	imply CRC32_VERIFY
 
diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c
index 8d617bee63..c4f5106750 100644
--- a/arch/arm/mach-tegra/pmc.c
+++ b/arch/arm/mach-tegra/pmc.c
@@ -84,12 +84,3 @@  void tegra_pmc_writel(u32 value, unsigned long offset)
 
 	writel(value, NV_PA_PMC_BASE + offset);
 }
-
-void reset_cpu(void)
-{
-	u32 value;
-
-	value = tegra_pmc_readl(PMC_CNTRL);
-	value |= PMC_CNTRL_MAIN_RST;
-	tegra_pmc_writel(value, PMC_CNTRL);
-}