| Message ID | 20230709224737.338525-2-judge.packham@gmail.com |
|---|---|
| State | Accepted |
| Commit | b04c21afd6535cd4af3f6d54ee154f1317e6b1fc |
| Delegated to: | Stefan Roese |
| Headers | show |
| Series | Support for AC5X NAND and AT-x240 board | expand |
On 7/10/23 00:47, Chris Packham wrote: > The AC5/AC5X SoC has a NAND flash controller. Add this to the > SoC device tree. > > Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Thanks, Stefan > --- > arch/arm/dts/ac5-98dx25xx.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm/dts/ac5-98dx25xx.dtsi b/arch/arm/dts/ac5-98dx25xx.dtsi > index 3c68355f323a..f53b4781d7fd 100644 > --- a/arch/arm/dts/ac5-98dx25xx.dtsi > +++ b/arch/arm/dts/ac5-98dx25xx.dtsi > @@ -251,6 +251,15 @@ > status = "disabled"; > }; > > + nand: nand-controller@805b0000 { > + compatible = "marvell,mvebu-ac5-pxa3xx-nand"; > + reg = <0x0 0x805b0000 0x0 0x54>; > + #address-cells = <0x00000001>; > + marvell,nand-enable-arbiter; > + num-cs = <0x00000001>; > + status = "disabled"; > + }; > + > gic: interrupt-controller@80600000 { > compatible = "arm,gic-v3"; > #interrupt-cells = <3>; Viele Grüße, Stefan Roese
diff --git a/arch/arm/dts/ac5-98dx25xx.dtsi b/arch/arm/dts/ac5-98dx25xx.dtsi index 3c68355f323a..f53b4781d7fd 100644 --- a/arch/arm/dts/ac5-98dx25xx.dtsi +++ b/arch/arm/dts/ac5-98dx25xx.dtsi @@ -251,6 +251,15 @@ status = "disabled"; }; + nand: nand-controller@805b0000 { + compatible = "marvell,mvebu-ac5-pxa3xx-nand"; + reg = <0x0 0x805b0000 0x0 0x54>; + #address-cells = <0x00000001>; + marvell,nand-enable-arbiter; + num-cs = <0x00000001>; + status = "disabled"; + }; + gic: interrupt-controller@80600000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>;
The AC5/AC5X SoC has a NAND flash controller. Add this to the SoC device tree. Signed-off-by: Chris Packham <judge.packham@gmail.com> --- arch/arm/dts/ac5-98dx25xx.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)