| Message ID | 20230526124107.894-5-dlan@gentoo.org |
|---|---|
| State | Changes Requested |
| Delegated to: | Andes |
| Headers | show |
| Series | riscv: Initial support for Lichee PI 4A board | expand |
Hi YiXun, On Fri, May 26, 2023 at 08:41:07PM +0800, Yixun Lan wrote: > Reviewed-by: Wei Fu <wefu@redhat.com> > Signed-off-by: Yixun Lan <dlan@gentoo.org> > --- > doc/board/index.rst | 1 + > doc/board/thead/index.rst | 9 +++ > doc/board/thead/lpi4a.rst | 112 ++++++++++++++++++++++++++++++++++++++ > 3 files changed, 122 insertions(+) > create mode 100644 doc/board/thead/index.rst > create mode 100644 doc/board/thead/lpi4a.rst > > diff --git a/doc/board/index.rst b/doc/board/index.rst > index 9ef25b1091..aadc90af89 100644 > --- a/doc/board/index.rst > +++ b/doc/board/index.rst > @@ -45,6 +45,7 @@ Board-specific doc > starfive/index > ste/index > tbs/index > + thead/index > ti/index > toradex/index > variscite/index > diff --git a/doc/board/thead/index.rst b/doc/board/thead/index.rst > new file mode 100644 > index 0000000000..41566d3a36 > --- /dev/null > +++ b/doc/board/thead/index.rst > @@ -0,0 +1,9 @@ > +.. SPDX-License-Identifier: GPL-2.0+ > + > +T-HEAD > +======== > + > +.. toctree:: > + :maxdepth: 1 > + > + lpi4a > diff --git a/doc/board/thead/lpi4a.rst b/doc/board/thead/lpi4a.rst > new file mode 100644 > index 0000000000..3764e732af > --- /dev/null > +++ b/doc/board/thead/lpi4a.rst > @@ -0,0 +1,112 @@ > +.. SPDX-License-Identifier: GPL-2.0+ > + > +Sipeed's Lichee PI 4A based on T-HEAD TH1520 SoC > +==================== > + The underline is too short and would cause error when building docs. Best regards, Leo > +TH1520 RISC-V SoC > +--------------------- > +The TH1520 is 4+2 core 64-bit RISC-V SoC from Alibaba T-HEAD, it's capable of > +running highest CPU frequency at 2.5 GHz, integrate Imagination GPU for graphics, > +also with 4 TOPS NPU for AI acceleration. > + > +Mainline support > +---------------- > + > +The support for following drivers are already enabled: > + > +1. ns16550 UART Driver. > + > +Building > +~~~~~~~~ > + > +1. Add the RISC-V toolchain to your PATH. > +2. Setup ARCH & cross compilation environment variable: > + > +.. code-block:: none > + > + export CROSS_COMPILE=<riscv64 toolchain prefix> > + > +The U-Boot is capable of running in M-Mode, so we can directly build it. > + > +.. code-block:: console > + > + cd <U-Boot-dir> > + make th1520_lpi4a_defconfig > + make > + > +This will generate u-boot-dtb.bin > + > +Booting > +~~~~~~~ > + > +Currently, we rely on vendor u-boot to initialize the clock, pinctrl subsystem, > +and chain load the mainline u-boot image either via tftp or emmc storage, > +then bootup from it. > + > +Sample boot log from Lichee PI 4A board via tftp > +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > + > +.. code-block:: none > + > + brom_ver 8 > + [APP][E] protocol_connect failed, exit. > + > + U-Boot SPL 2020.01-00016-g8c870a6be8 (May 20 2023 - 01:04:49 +0000) > + FM[1] lpddr4x dualrank freq=3733 64bit dbi_off=n sdram init > + ddr initialized, jump to uboot > + image has no header > + > + > + U-Boot 2020.01-00016-g8c870a6be8 (May 20 2023 - 01:04:49 +0000) > + > + CPU: rv64imafdcvsu > + Model: T-HEAD c910 light > + DRAM: 8 GiB > + C910 CPU FREQ: 750MHz > + AHB2_CPUSYS_HCLK FREQ: 250MHz > + AHB3_CPUSYS_PCLK FREQ: 125MHz > + PERISYS_AHB_HCLK FREQ: 250MHz > + PERISYS_APB_PCLK FREQ: 62MHz > + GMAC PLL POSTDIV FREQ: 1000MHZ > + DPU0 PLL POSTDIV FREQ: 1188MHZ > + DPU1 PLL POSTDIV FREQ: 1188MHZ > + MMC: sdhci@ffe7080000: 0, sd@ffe7090000: 1 > + Loading Environment from MMC... OK > + Error reading output register > + Warning: cannot get lcd-en GPIO > + LCD panel cannot be found : -121 > + splash screen startup cost 16 ms > + In: serial > + Out: serial > + Err: serial > + Net: > + Warning: ethernet@ffe7070000 using MAC address from ROM > + eth0: ethernet@ffe7070000ethernet@ffe7070000:0 is connected to ethernet@ffe7070000. Reconnecting to ethernet@ffe7060000 > + > + Warning: ethernet@ffe7060000 (eth1) using random MAC address - 42:25:d4:16:5f:fc > + , eth1: ethernet@ffe7060000 > + Hit any key to stop autoboot: 2 > + ethernet@ffe7060000 Waiting for PHY auto negotiation to complete.. done > + Speed: 1000, full duplex > + Using ethernet@ffe7070000 device > + TFTP from server 192.168.8.50; our IP address is 192.168.8.45 > + Filename 'u-boot-dtb.bin'. > + Load address: 0x1c00000 > + Loading: * ######################### > + 8 MiB/s > + done > + Bytes transferred = 376686 (5bf6e hex) > + ## Starting application at 0x01C00000 ... > + > + U-Boot 2023.07-rc2-00004-g1befbe31c1 (May 23 2023 - 18:40:01 +0800) > + > + CPU: rv64imafdc > + Model: Sipeed Lichee Pi 4A > + DRAM: 8 GiB > + Core: 13 devices, 6 uclasses, devicetree: separate > + Loading Environment from <NULL>... OK > + In: serial@ffe7014000 > + Out: serial@ffe7014000 > + Err: serial@ffe7014000 > + Model: Sipeed Lichee Pi 4A > + LPI4A=> > -- > 2.40.0 >
diff --git a/doc/board/index.rst b/doc/board/index.rst index 9ef25b1091..aadc90af89 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -45,6 +45,7 @@ Board-specific doc starfive/index ste/index tbs/index + thead/index ti/index toradex/index variscite/index diff --git a/doc/board/thead/index.rst b/doc/board/thead/index.rst new file mode 100644 index 0000000000..41566d3a36 --- /dev/null +++ b/doc/board/thead/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +T-HEAD +======== + +.. toctree:: + :maxdepth: 1 + + lpi4a diff --git a/doc/board/thead/lpi4a.rst b/doc/board/thead/lpi4a.rst new file mode 100644 index 0000000000..3764e732af --- /dev/null +++ b/doc/board/thead/lpi4a.rst @@ -0,0 +1,112 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Sipeed's Lichee PI 4A based on T-HEAD TH1520 SoC +==================== + +TH1520 RISC-V SoC +--------------------- +The TH1520 is 4+2 core 64-bit RISC-V SoC from Alibaba T-HEAD, it's capable of +running highest CPU frequency at 2.5 GHz, integrate Imagination GPU for graphics, +also with 4 TOPS NPU for AI acceleration. + +Mainline support +---------------- + +The support for following drivers are already enabled: + +1. ns16550 UART Driver. + +Building +~~~~~~~~ + +1. Add the RISC-V toolchain to your PATH. +2. Setup ARCH & cross compilation environment variable: + +.. code-block:: none + + export CROSS_COMPILE=<riscv64 toolchain prefix> + +The U-Boot is capable of running in M-Mode, so we can directly build it. + +.. code-block:: console + + cd <U-Boot-dir> + make th1520_lpi4a_defconfig + make + +This will generate u-boot-dtb.bin + +Booting +~~~~~~~ + +Currently, we rely on vendor u-boot to initialize the clock, pinctrl subsystem, +and chain load the mainline u-boot image either via tftp or emmc storage, +then bootup from it. + +Sample boot log from Lichee PI 4A board via tftp +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +.. code-block:: none + + brom_ver 8 + [APP][E] protocol_connect failed, exit. + + U-Boot SPL 2020.01-00016-g8c870a6be8 (May 20 2023 - 01:04:49 +0000) + FM[1] lpddr4x dualrank freq=3733 64bit dbi_off=n sdram init + ddr initialized, jump to uboot + image has no header + + + U-Boot 2020.01-00016-g8c870a6be8 (May 20 2023 - 01:04:49 +0000) + + CPU: rv64imafdcvsu + Model: T-HEAD c910 light + DRAM: 8 GiB + C910 CPU FREQ: 750MHz + AHB2_CPUSYS_HCLK FREQ: 250MHz + AHB3_CPUSYS_PCLK FREQ: 125MHz + PERISYS_AHB_HCLK FREQ: 250MHz + PERISYS_APB_PCLK FREQ: 62MHz + GMAC PLL POSTDIV FREQ: 1000MHZ + DPU0 PLL POSTDIV FREQ: 1188MHZ + DPU1 PLL POSTDIV FREQ: 1188MHZ + MMC: sdhci@ffe7080000: 0, sd@ffe7090000: 1 + Loading Environment from MMC... OK + Error reading output register + Warning: cannot get lcd-en GPIO + LCD panel cannot be found : -121 + splash screen startup cost 16 ms + In: serial + Out: serial + Err: serial + Net: + Warning: ethernet@ffe7070000 using MAC address from ROM + eth0: ethernet@ffe7070000ethernet@ffe7070000:0 is connected to ethernet@ffe7070000. Reconnecting to ethernet@ffe7060000 + + Warning: ethernet@ffe7060000 (eth1) using random MAC address - 42:25:d4:16:5f:fc + , eth1: ethernet@ffe7060000 + Hit any key to stop autoboot: 2 + ethernet@ffe7060000 Waiting for PHY auto negotiation to complete.. done + Speed: 1000, full duplex + Using ethernet@ffe7070000 device + TFTP from server 192.168.8.50; our IP address is 192.168.8.45 + Filename 'u-boot-dtb.bin'. + Load address: 0x1c00000 + Loading: * ######################### + 8 MiB/s + done + Bytes transferred = 376686 (5bf6e hex) + ## Starting application at 0x01C00000 ... + + U-Boot 2023.07-rc2-00004-g1befbe31c1 (May 23 2023 - 18:40:01 +0800) + + CPU: rv64imafdc + Model: Sipeed Lichee Pi 4A + DRAM: 8 GiB + Core: 13 devices, 6 uclasses, devicetree: separate + Loading Environment from <NULL>... OK + In: serial@ffe7014000 + Out: serial@ffe7014000 + Err: serial@ffe7014000 + Model: Sipeed Lichee Pi 4A + LPI4A=>