diff mbox series

[v4,11/11] configs: starfive: Enable ID EEPROM configuration

Message ID 20230525093637.31364-12-yanhong.wang@starfivetech.com
State Superseded
Delegated to: Andes
Headers show
Series Add ethernet driver for StarFive JH7110 SoC | expand

Commit Message

Yanhong Wang May 25, 2023, 9:36 a.m. UTC
Enabled ID_EEPROM and I2C configuration for StarFive VisionFive2 board.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
---
 configs/starfive_visionfive2_defconfig | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

Comments

Jan Kiszka June 4, 2023, 7:23 p.m. UTC | #1
On 25.05.23 11:36, Yanhong Wang wrote:
> Enabled ID_EEPROM and I2C configuration for StarFive VisionFive2 board.
> 
> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
> ---
>  configs/starfive_visionfive2_defconfig | 19 ++++++++++++++++++-
>  1 file changed, 18 insertions(+), 1 deletion(-)
> 
> diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig
> index c57708199d..570a1f53a1 100644
> --- a/configs/starfive_visionfive2_defconfig
> +++ b/configs/starfive_visionfive2_defconfig
> @@ -13,6 +13,7 @@ CONFIG_SYS_PROMPT="StarFive #"
>  CONFIG_OF_LIBFDT_OVERLAY=y
>  CONFIG_DM_RESET=y
>  CONFIG_SPL_MMC=y
> +CONFIG_SPL_DRIVERS_MISC=y
>  CONFIG_SPL_STACK=0x8180000
>  CONFIG_SPL=y
>  CONFIG_SPL_SPI_FLASH_SUPPORT=y
> @@ -23,6 +24,7 @@ CONFIG_SPL_OPENSBI_LOAD_ADDR=0x40000000
>  CONFIG_ARCH_RV64I=y
>  CONFIG_CMODEL_MEDANY=y
>  CONFIG_RISCV_SMODE=y
> +# CONFIG_OF_BOARD_FIXUP is not set
>  CONFIG_FIT=y
>  CONFIG_DISTRO_DEFAULTS=y
>  CONFIG_QSPI_BOOT=y
> @@ -34,6 +36,8 @@ CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};"
>  CONFIG_DEFAULT_FDT_FILE="starfive/jh7110-starfive-visionfive-2.dtb"
>  CONFIG_DISPLAY_CPUINFO=y
>  CONFIG_DISPLAY_BOARDINFO=y
> +CONFIG_ID_EEPROM=y
> +CONFIG_SYS_EEPROM_BUS_NUM=5
>  CONFIG_SPL_MAX_SIZE=0x40000
>  CONFIG_SPL_PAD_TO=0x0
>  CONFIG_SPL_BSS_START_ADDR=0x8040000
> @@ -45,21 +49,34 @@ CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80000000
>  CONFIG_SYS_SPL_MALLOC_SIZE=0x400000
>  CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
>  CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2
> +CONFIG_SPL_I2C=y
>  CONFIG_SPL_DM_SPI_FLASH=y
>  CONFIG_SPL_DM_RESET=y
>  CONFIG_SPL_SPI_LOAD=y
>  CONFIG_SYS_CBSIZE=256
>  CONFIG_SYS_PBSIZE=276
>  CONFIG_SYS_BOOTM_LEN=0x4000000
> +CONFIG_CMD_EEPROM=y
> +CONFIG_SYS_EEPROM_SIZE=512
> +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
> +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
>  CONFIG_CMD_MEMINFO=y
> +CONFIG_CMD_I2C=y
>  CONFIG_CMD_TFTPPUT=y
> +CONFIG_OF_BOARD=y
>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_REGMAP=y
>  CONFIG_SYSCON=y
>  CONFIG_SPL_CLK_COMPOSITE_CCF=y
>  CONFIG_CLK_COMPOSITE_CCF=y
>  CONFIG_SPL_CLK_JH7110=y
> -# CONFIG_I2C is not set
> +CONFIG_DM_I2C=y
> +CONFIG_SYS_I2C_DW=y
> +CONFIG_MISC=y
> +CONFIG_I2C_EEPROM=y
> +CONFIG_SPL_I2C_EEPROM=y
> +CONFIG_SYS_I2C_EEPROM_ADDR=0X50
>  CONFIG_MMC_HS400_SUPPORT=y
>  CONFIG_SPL_MMC_HS400_SUPPORT=y
>  CONFIG_MMC_DW=y

This comes too late: Already patch 4 needs at least CONFIG_ID_EEPROM=y,
if not more.

Make sure you don't leave non-bisectable commit series behind. Whenever
something breaks (like 55171aedda88), people will use bisection to find
the causing commit, and then they will appreciate not having to deal
with such hick-ups.

Jan
Yanhong Wang June 7, 2023, 2:19 a.m. UTC | #2
On 2023/6/5 3:23, Jan Kiszka wrote:
> On 25.05.23 11:36, Yanhong Wang wrote:
>> Enabled ID_EEPROM and I2C configuration for StarFive VisionFive2 board.
>> 
>> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
>> ---
>>  configs/starfive_visionfive2_defconfig | 19 ++++++++++++++++++-
>>  1 file changed, 18 insertions(+), 1 deletion(-)
>> 
>> diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig
>> index c57708199d..570a1f53a1 100644
>> --- a/configs/starfive_visionfive2_defconfig
>> +++ b/configs/starfive_visionfive2_defconfig
>> @@ -13,6 +13,7 @@ CONFIG_SYS_PROMPT="StarFive #"
>>  CONFIG_OF_LIBFDT_OVERLAY=y
>>  CONFIG_DM_RESET=y
>>  CONFIG_SPL_MMC=y
>> +CONFIG_SPL_DRIVERS_MISC=y
>>  CONFIG_SPL_STACK=0x8180000
>>  CONFIG_SPL=y
>>  CONFIG_SPL_SPI_FLASH_SUPPORT=y
>> @@ -23,6 +24,7 @@ CONFIG_SPL_OPENSBI_LOAD_ADDR=0x40000000
>>  CONFIG_ARCH_RV64I=y
>>  CONFIG_CMODEL_MEDANY=y
>>  CONFIG_RISCV_SMODE=y
>> +# CONFIG_OF_BOARD_FIXUP is not set
>>  CONFIG_FIT=y
>>  CONFIG_DISTRO_DEFAULTS=y
>>  CONFIG_QSPI_BOOT=y
>> @@ -34,6 +36,8 @@ CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};"
>>  CONFIG_DEFAULT_FDT_FILE="starfive/jh7110-starfive-visionfive-2.dtb"
>>  CONFIG_DISPLAY_CPUINFO=y
>>  CONFIG_DISPLAY_BOARDINFO=y
>> +CONFIG_ID_EEPROM=y
>> +CONFIG_SYS_EEPROM_BUS_NUM=5
>>  CONFIG_SPL_MAX_SIZE=0x40000
>>  CONFIG_SPL_PAD_TO=0x0
>>  CONFIG_SPL_BSS_START_ADDR=0x8040000
>> @@ -45,21 +49,34 @@ CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80000000
>>  CONFIG_SYS_SPL_MALLOC_SIZE=0x400000
>>  CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
>>  CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2
>> +CONFIG_SPL_I2C=y
>>  CONFIG_SPL_DM_SPI_FLASH=y
>>  CONFIG_SPL_DM_RESET=y
>>  CONFIG_SPL_SPI_LOAD=y
>>  CONFIG_SYS_CBSIZE=256
>>  CONFIG_SYS_PBSIZE=276
>>  CONFIG_SYS_BOOTM_LEN=0x4000000
>> +CONFIG_CMD_EEPROM=y
>> +CONFIG_SYS_EEPROM_SIZE=512
>> +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
>> +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
>>  CONFIG_CMD_MEMINFO=y
>> +CONFIG_CMD_I2C=y
>>  CONFIG_CMD_TFTPPUT=y
>> +CONFIG_OF_BOARD=y
>>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>> +CONFIG_SPL_DM_SEQ_ALIAS=y
>>  CONFIG_REGMAP=y
>>  CONFIG_SYSCON=y
>>  CONFIG_SPL_CLK_COMPOSITE_CCF=y
>>  CONFIG_CLK_COMPOSITE_CCF=y
>>  CONFIG_SPL_CLK_JH7110=y
>> -# CONFIG_I2C is not set
>> +CONFIG_DM_I2C=y
>> +CONFIG_SYS_I2C_DW=y
>> +CONFIG_MISC=y
>> +CONFIG_I2C_EEPROM=y
>> +CONFIG_SPL_I2C_EEPROM=y
>> +CONFIG_SYS_I2C_EEPROM_ADDR=0X50
>>  CONFIG_MMC_HS400_SUPPORT=y
>>  CONFIG_SPL_MMC_HS400_SUPPORT=y
>>  CONFIG_MMC_DW=y
> 
> This comes too late: Already patch 4 needs at least CONFIG_ID_EEPROM=y,
> if not more.
> 

Moving patch 4 to the series end, is that okay?

> Make sure you don't leave non-bisectable commit series behind. Whenever
> something breaks (like 55171aedda88), people will use bisection to find
> the causing commit, and then they will appreciate not having to deal
> with such hick-ups.
> 
> Jan
>
Jan Kiszka June 7, 2023, 12:30 p.m. UTC | #3
On 07.06.23 04:19, yanhong wang wrote:
> 
> 
> On 2023/6/5 3:23, Jan Kiszka wrote:
>> On 25.05.23 11:36, Yanhong Wang wrote:
>>> Enabled ID_EEPROM and I2C configuration for StarFive VisionFive2 board.
>>>
>>> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
>>> ---
>>>  configs/starfive_visionfive2_defconfig | 19 ++++++++++++++++++-
>>>  1 file changed, 18 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig
>>> index c57708199d..570a1f53a1 100644
>>> --- a/configs/starfive_visionfive2_defconfig
>>> +++ b/configs/starfive_visionfive2_defconfig
>>> @@ -13,6 +13,7 @@ CONFIG_SYS_PROMPT="StarFive #"
>>>  CONFIG_OF_LIBFDT_OVERLAY=y
>>>  CONFIG_DM_RESET=y
>>>  CONFIG_SPL_MMC=y
>>> +CONFIG_SPL_DRIVERS_MISC=y
>>>  CONFIG_SPL_STACK=0x8180000
>>>  CONFIG_SPL=y
>>>  CONFIG_SPL_SPI_FLASH_SUPPORT=y
>>> @@ -23,6 +24,7 @@ CONFIG_SPL_OPENSBI_LOAD_ADDR=0x40000000
>>>  CONFIG_ARCH_RV64I=y
>>>  CONFIG_CMODEL_MEDANY=y
>>>  CONFIG_RISCV_SMODE=y
>>> +# CONFIG_OF_BOARD_FIXUP is not set
>>>  CONFIG_FIT=y
>>>  CONFIG_DISTRO_DEFAULTS=y
>>>  CONFIG_QSPI_BOOT=y
>>> @@ -34,6 +36,8 @@ CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};"
>>>  CONFIG_DEFAULT_FDT_FILE="starfive/jh7110-starfive-visionfive-2.dtb"
>>>  CONFIG_DISPLAY_CPUINFO=y
>>>  CONFIG_DISPLAY_BOARDINFO=y
>>> +CONFIG_ID_EEPROM=y
>>> +CONFIG_SYS_EEPROM_BUS_NUM=5
>>>  CONFIG_SPL_MAX_SIZE=0x40000
>>>  CONFIG_SPL_PAD_TO=0x0
>>>  CONFIG_SPL_BSS_START_ADDR=0x8040000
>>> @@ -45,21 +49,34 @@ CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80000000
>>>  CONFIG_SYS_SPL_MALLOC_SIZE=0x400000
>>>  CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
>>>  CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2
>>> +CONFIG_SPL_I2C=y
>>>  CONFIG_SPL_DM_SPI_FLASH=y
>>>  CONFIG_SPL_DM_RESET=y
>>>  CONFIG_SPL_SPI_LOAD=y
>>>  CONFIG_SYS_CBSIZE=256
>>>  CONFIG_SYS_PBSIZE=276
>>>  CONFIG_SYS_BOOTM_LEN=0x4000000
>>> +CONFIG_CMD_EEPROM=y
>>> +CONFIG_SYS_EEPROM_SIZE=512
>>> +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
>>> +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
>>>  CONFIG_CMD_MEMINFO=y
>>> +CONFIG_CMD_I2C=y
>>>  CONFIG_CMD_TFTPPUT=y
>>> +CONFIG_OF_BOARD=y
>>>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>>> +CONFIG_SPL_DM_SEQ_ALIAS=y
>>>  CONFIG_REGMAP=y
>>>  CONFIG_SYSCON=y
>>>  CONFIG_SPL_CLK_COMPOSITE_CCF=y
>>>  CONFIG_CLK_COMPOSITE_CCF=y
>>>  CONFIG_SPL_CLK_JH7110=y
>>> -# CONFIG_I2C is not set
>>> +CONFIG_DM_I2C=y
>>> +CONFIG_SYS_I2C_DW=y
>>> +CONFIG_MISC=y
>>> +CONFIG_I2C_EEPROM=y
>>> +CONFIG_SPL_I2C_EEPROM=y
>>> +CONFIG_SYS_I2C_EEPROM_ADDR=0X50
>>>  CONFIG_MMC_HS400_SUPPORT=y
>>>  CONFIG_SPL_MMC_HS400_SUPPORT=y
>>>  CONFIG_MMC_DW=y
>>
>> This comes too late: Already patch 4 needs at least CONFIG_ID_EEPROM=y,
>> if not more.
>>
> 
> Moving patch 4 to the series end, is that okay?
> 

I didn't try. I would recommend that you to run a quick build check
after each patch being applied for the affected defconfig(s). Can be
automated (git rebase --exec ...).

Jan
diff mbox series

Patch

diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig
index c57708199d..570a1f53a1 100644
--- a/configs/starfive_visionfive2_defconfig
+++ b/configs/starfive_visionfive2_defconfig
@@ -13,6 +13,7 @@  CONFIG_SYS_PROMPT="StarFive #"
 CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_DM_RESET=y
 CONFIG_SPL_MMC=y
+CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK=0x8180000
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -23,6 +24,7 @@  CONFIG_SPL_OPENSBI_LOAD_ADDR=0x40000000
 CONFIG_ARCH_RV64I=y
 CONFIG_CMODEL_MEDANY=y
 CONFIG_RISCV_SMODE=y
+# CONFIG_OF_BOARD_FIXUP is not set
 CONFIG_FIT=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_QSPI_BOOT=y
@@ -34,6 +36,8 @@  CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};"
 CONFIG_DEFAULT_FDT_FILE="starfive/jh7110-starfive-visionfive-2.dtb"
 CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_ID_EEPROM=y
+CONFIG_SYS_EEPROM_BUS_NUM=5
 CONFIG_SPL_MAX_SIZE=0x40000
 CONFIG_SPL_PAD_TO=0x0
 CONFIG_SPL_BSS_START_ADDR=0x8040000
@@ -45,21 +49,34 @@  CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80000000
 CONFIG_SYS_SPL_MALLOC_SIZE=0x400000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2
+CONFIG_SPL_I2C=y
 CONFIG_SPL_DM_SPI_FLASH=y
 CONFIG_SPL_DM_RESET=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_CBSIZE=256
 CONFIG_SYS_PBSIZE=276
 CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_SIZE=512
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
 CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_TFTPPUT=y
+CONFIG_OF_BOARD=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SPL_CLK_COMPOSITE_CCF=y
 CONFIG_CLK_COMPOSITE_CCF=y
 CONFIG_SPL_CLK_JH7110=y
-# CONFIG_I2C is not set
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_SPL_I2C_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0X50
 CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_SPL_MMC_HS400_SUPPORT=y
 CONFIG_MMC_DW=y