| Message ID | 20230515233207.14104-3-andre.przywara@arm.com |
|---|---|
| State | Accepted |
| Commit | b0816e3bd38d0273bbc6fce1fe87fd842991733c |
| Delegated to: | Andre Przywara |
| Headers | show |
| Series | sunxi: DT update plus new board support | expand |
diff --git a/configs/lctech_pi_f1c200s_defconfig b/configs/lctech_pi_f1c200s_defconfig new file mode 100644 index 00000000000..310719cf915 --- /dev/null +++ b/configs/lctech_pi_f1c200s_defconfig @@ -0,0 +1,11 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="suniv-f1c200s-lctech-pi" +CONFIG_SPL=y +CONFIG_MACH_SUNIV=y +CONFIG_DRAM_CLK=156 +CONFIG_DRAM_ZQ=0 +CONFIG_SUNXI_MINIMUM_DRAM_MB=64 +# CONFIG_VIDEO_SUNXI is not set +CONFIG_CONS_INDEX=2 +CONFIG_SPI=y
The Lctech Pi F1C200s (also previously known under the Cherry Pi brand) is a small development board with the Allwinner F1C200s SoC. This is the same as the F1C100s, but with 64MB instead of 32MB co-packaged DRAM. Add a defconfig for this board, enabling the most basic features. This uses the new 64MB memory map, which avoids the very tight memory map we use for the 32MB F1C100s board(s). The devicetree file is already in the tree, courtesy of the previous Linux repo sync. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- configs/lctech_pi_f1c200s_defconfig | 11 +++++++++++ 1 file changed, 11 insertions(+) create mode 100644 configs/lctech_pi_f1c200s_defconfig