diff mbox series

[v3,1/2] clk: rockchip: rk3568: add stubs for CLK_PCIEPHY_REF clocks

Message ID 20230308051611.80965-1-anarsoul@gmail.com
State Accepted
Commit 4340771323fc8cc9eee5508ffabbd48d0d83c27a
Delegated to: Kever Yang
Headers show
Series [v3,1/2] clk: rockchip: rk3568: add stubs for CLK_PCIEPHY_REF clocks | expand

Commit Message

Vasily Khoruzhick March 8, 2023, 5:16 a.m. UTC 
Device tree contains assigned-clock-rates property for these,
but default value will work just fine

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
v3: add r-b tag from Kever
v2: implement stubs for CLK_PCIEPHY_REF instead of dropping
assigned-clock properties

 drivers/clk/rockchip/clk_rk3568.c | 3 +++
 1 file changed, 3 insertions(+)
diff mbox series

Patch

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index 253b69504f..1c6adc56f9 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -425,6 +425,9 @@  static ulong rk3568_pmuclk_set_rate(struct clk *clk, ulong rate)
 	case PCLK_PMU:
 		ret = rk3568_pmu_set_pmuclk(priv, rate);
 		break;
+	case CLK_PCIEPHY0_REF:
+	case CLK_PCIEPHY1_REF:
+		return 0;
 	default:
 		return -ENOENT;
 	}