From patchwork Mon Mar 6 14:53:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1752467 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=hhlW8aNX; dkim=pass (2048-bit key) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=a1mpmTf0; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PVhSk1WC0z1yWw for ; Tue, 7 Mar 2023 01:55:02 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6076F85DB6; Mon, 6 Mar 2023 15:54:44 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1678114487; bh=4MtEPmNyzK78H48WvtjxPi6QD2PgOrFo31imuzrkOYw=; h=From:To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From; b=hhlW8aNX7hhk/AVLSRuGyXywc8w6Wip8wULFwHvj7gwD6IRtBPV4vr8HVwLWYxLkA F6LKcbVIoV6V7Ww+j1VlDO3161BxM8JAjGBw5ChL8l47o9nxunBp+NhvBgiBiALVxG TdjUL5izAhNxQ2ofQ6kWzKCM8iKLTd6f1oBlauhIBvvqZzMtnYc037eBeGIKjoeBr3 +PvXt3PCcfgHzLU0+08xJsEanGQ4Dh/0MPgCv0jbpNwHumVt1g6kgCpYoHcit8AJ4V 7hw9h+A7v4iKP+rmjluTGrAQFGUfS1rFVpW+4cXVrWAZaFakSDWzJc2qyoG5BaB/n1 28U7gzscViOxw== Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id C00B483CB4; Mon, 6 Mar 2023 15:54:04 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1678114445; bh=4MtEPmNyzK78H48WvtjxPi6QD2PgOrFo31imuzrkOYw=; h=From:To:Cc:Subject:Date:From; b=a1mpmTf0ZEy6jVlQO5LzcgyA0cI5sLuubJhcqWgBeVaET3ygefYtQvBQZPkGlgzJ5 ReHZ2VE6855M58zIPnFL15L6CR506RhDyg79RgHxW8zjXDhKMD4gDWhBzgd7a/3GYf d93GLu6YF8npFGFl6eEzKD6iNesDwUxpP7us3+QSnhAb036uc9Jy+ApOplK7Srm/Ca pHgjgIO9RUWAj/kYTqmY8J6I5nH5XEfFvZUd84T4Rk1Xt/GWp045nzh0NEnr+b3fST 7cLyUuBFdQskFmOcAZl0kdRo2pnXi+ZaEmhIl8hdW67cNgFGnT2w1vRhGGwLpV5fl9 1yiq7TpvX8l0w== From: Marek Vasut To: u-boot@lists.denx.de Cc: Marek Vasut , Sean Anderson , Peng Fan , "Ariel D'Alessandro" , "NXP i.MX U-Boot Team" , Andrey Zhizhikin , Fabio Estevam , Joe Hershberger , Lukasz Majewski , Marcel Ziswiler , Michael Trimarchi , Ramon Fried , Stefano Babic , Tim Harvey , Tommaso Merciai Subject: [PATCH v4 01/14] clk: imx8mp: Add EQoS MAC clock Date: Mon, 6 Mar 2023 15:53:41 +0100 Message-Id: <20230306145354.7439-1-marex@denx.de> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add clock for the DWMAC EQoS block. This is used among other things to configure the MII clock via DM CLK. Acked-by: Sean Anderson Reviewed-by: Peng Fan Signed-off-by: Marek Vasut --- Cc: "Ariel D'Alessandro" Cc: "NXP i.MX U-Boot Team" Cc: Andrey Zhizhikin Cc: Fabio Estevam Cc: Joe Hershberger Cc: Lukasz Majewski Cc: Marcel Ziswiler Cc: Marek Vasut Cc: Michael Trimarchi Cc: Peng Fan Cc: Ramon Fried Cc: Sean Anderson Cc: Stefano Babic Cc: Tim Harvey Cc: Tommaso Merciai Cc: u-boot@lists.denx.de --- V2: Add AB from Sean V3: No change V4: No change --- drivers/clk/imx/clk-imx8mp.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index ffbc1d1ba9f..6dda0403e35 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -70,6 +70,14 @@ static const char *imx8mp_i2c6_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_ "sys_pll3_out", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", "sys_pll1_133m", }; +static const char *imx8mp_enet_qos_sels[] = {"clock-osc-24m", "sys_pll2_125m", "sys_pll2_50m", + "sys_pll2_100m", "sys_pll1_160m", "audio_pll1_out", + "video_pll1_out", "clk_ext4", }; + +static const char *imx8mp_enet_qos_timer_sels[] = {"clock-osc-24m", "sys_pll2_100m", "audio_pll1_out", + "clk_ext1", "clk_ext2", "clk_ext3", + "clk_ext4", "video_pll1_out", }; + static const char *imx8mp_usdhc1_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m", "sys_pll3_out", "sys_pll1_266m", "audio_pll2_out", "sys_pll1_100m", }; @@ -250,6 +258,8 @@ static int imx8mp_clk_probe(struct udevice *dev) clk_dm(IMX8MP_CLK_DRAM_APB, imx8m_clk_composite_critical("dram_apb", imx8mp_dram_apb_sels, base + 0xa080)); clk_dm(IMX8MP_CLK_I2C5, imx8m_clk_composite("i2c5", imx8mp_i2c5_sels, base + 0xa480)); clk_dm(IMX8MP_CLK_I2C6, imx8m_clk_composite("i2c6", imx8mp_i2c6_sels, base + 0xa500)); + clk_dm(IMX8MP_CLK_ENET_QOS, imx8m_clk_composite("enet_qos", imx8mp_enet_qos_sels, base + 0xa880)); + clk_dm(IMX8MP_CLK_ENET_QOS_TIMER, imx8m_clk_composite("enet_qos_timer", imx8mp_enet_qos_timer_sels, base + 0xa900)); clk_dm(IMX8MP_CLK_ENET_REF, imx8m_clk_composite("enet_ref", imx8mp_enet_ref_sels, base + 0xa980)); clk_dm(IMX8MP_CLK_ENET_TIMER, imx8m_clk_composite("enet_timer", imx8mp_enet_timer_sels, base + 0xaa00)); clk_dm(IMX8MP_CLK_ENET_PHY_REF, imx8m_clk_composite("enet_phy_ref", imx8mp_enet_phy_ref_sels, base + 0xaa80)); @@ -292,10 +302,13 @@ static int imx8mp_clk_probe(struct udevice *dev) clk_dm(IMX8MP_CLK_I2C2_ROOT, imx_clk_gate4("i2c2_root_clk", "i2c2", base + 0x4180, 0)); clk_dm(IMX8MP_CLK_I2C3_ROOT, imx_clk_gate4("i2c3_root_clk", "i2c3", base + 0x4190, 0)); clk_dm(IMX8MP_CLK_I2C4_ROOT, imx_clk_gate4("i2c4_root_clk", "i2c4", base + 0x41a0, 0)); + clk_dm(IMX8MP_CLK_QOS_ROOT, imx_clk_gate4("qos_root_clk", "ipg_root", base + 0x42c0, 0)); + clk_dm(IMX8MP_CLK_QOS_ENET_ROOT, imx_clk_gate4("qos_enet_root_clk", "ipg_root", base + 0x42e0, 0)); clk_dm(IMX8MP_CLK_QSPI_ROOT, imx_clk_gate4("qspi_root_clk", "qspi", base + 0x42f0, 0)); clk_dm(IMX8MP_CLK_I2C5_ROOT, imx_clk_gate2("i2c5_root_clk", "i2c5", base + 0x4330, 0)); clk_dm(IMX8MP_CLK_I2C6_ROOT, imx_clk_gate2("i2c6_root_clk", "i2c6", base + 0x4340, 0)); clk_dm(IMX8MP_CLK_SIM_ENET_ROOT, imx_clk_gate4("sim_enet_root_clk", "enet_axi", base + 0x4400, 0)); + clk_dm(IMX8MP_CLK_ENET_QOS_ROOT, imx_clk_gate4("enet_qos_root_clk", "sim_enet_root_clk", base + 0x43b0, 0)); clk_dm(IMX8MP_CLK_UART1_ROOT, imx_clk_gate4("uart1_root_clk", "uart1", base + 0x4490, 0)); clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0)); clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0));