| Message ID | 20230130145749.177515-8-jagan@edgeble.ai |
|---|---|
| State | Accepted |
| Commit | 3b7f29f2c8b6d4f1ad52fb98b22a5f8529a3a1ba |
| Delegated to: | Kever Yang |
| Headers | show |
| Series | arm: Add Rockchip RK3588 support | expand |
On 2023/1/30 22:57, Jagan Teki wrote: > Add ddr driver for rk3588 to get the ram capacity. > > Co-developed-by: Jonas Karlman <jonas@kwiboo.se> > Signed-off-by: Jonas Karlman <jonas@kwiboo.se> > Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > drivers/ram/rockchip/Makefile | 1 + > drivers/ram/rockchip/sdram_rk3588.c | 57 +++++++++++++++++++++++++++++ > 2 files changed, 58 insertions(+) > create mode 100644 drivers/ram/rockchip/sdram_rk3588.c > > diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile > index 98839ad6a6..36dc0500da 100644 > --- a/drivers/ram/rockchip/Makefile > +++ b/drivers/ram/rockchip/Makefile > @@ -14,5 +14,6 @@ obj-$(CONFIG_ROCKCHIP_RK3308) = sdram_rk3308.o > obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o sdram_pctl_px30.o sdram_phy_px30.o > obj-$(CONFIG_ROCKCHIP_RK3399) += sdram_rk3399.o > obj-$(CONFIG_ROCKCHIP_RK3568) += sdram_rk3568.o > +obj-$(CONFIG_ROCKCHIP_RK3588) += sdram_rk3588.o > obj-$(CONFIG_ROCKCHIP_RV1126) += sdram_rv1126.o sdram_pctl_px30.o > obj-$(CONFIG_ROCKCHIP_SDRAM_COMMON) += sdram_common.o > diff --git a/drivers/ram/rockchip/sdram_rk3588.c b/drivers/ram/rockchip/sdram_rk3588.c > new file mode 100644 > index 0000000000..cf56e2a941 > --- /dev/null > +++ b/drivers/ram/rockchip/sdram_rk3588.c > @@ -0,0 +1,57 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * (C) Copyright 2021 Rockchip Electronics Co., Ltd. > + */ > + > +#include <common.h> > +#include <dm.h> > +#include <ram.h> > +#include <syscon.h> > +#include <asm/arch-rockchip/clock.h> > +#include <asm/arch-rockchip/grf_rk3588.h> > +#include <asm/arch-rockchip/sdram.h> > + > +struct dram_info { > + struct ram_info info; > + struct rk3588_pmu1grf *pmugrf; > +}; > + > +static int rk3588_dmc_probe(struct udevice *dev) > +{ > + struct dram_info *priv = dev_get_priv(dev); > + > + priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); > + priv->info.base = CFG_SYS_SDRAM_BASE; > + priv->info.size = > + rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]) + > + rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[4]); > + > + return 0; > +} > + > +static int rk3588_dmc_get_info(struct udevice *dev, struct ram_info *info) > +{ > + struct dram_info *priv = dev_get_priv(dev); > + > + *info = priv->info; > + > + return 0; > +} > + > +static struct ram_ops rk3588_dmc_ops = { > + .get_info = rk3588_dmc_get_info, > +}; > + > +static const struct udevice_id rk3588_dmc_ids[] = { > + { .compatible = "rockchip,rk3588-dmc" }, > + { } > +}; > + > +U_BOOT_DRIVER(dmc_rk3588) = { > + .name = "rockchip_rk3588_dmc", > + .id = UCLASS_RAM, > + .of_match = rk3588_dmc_ids, > + .ops = &rk3588_dmc_ops, > + .probe = rk3588_dmc_probe, > + .priv_auto = sizeof(struct dram_info), > +};
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile index 98839ad6a6..36dc0500da 100644 --- a/drivers/ram/rockchip/Makefile +++ b/drivers/ram/rockchip/Makefile @@ -14,5 +14,6 @@ obj-$(CONFIG_ROCKCHIP_RK3308) = sdram_rk3308.o obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o sdram_pctl_px30.o sdram_phy_px30.o obj-$(CONFIG_ROCKCHIP_RK3399) += sdram_rk3399.o obj-$(CONFIG_ROCKCHIP_RK3568) += sdram_rk3568.o +obj-$(CONFIG_ROCKCHIP_RK3588) += sdram_rk3588.o obj-$(CONFIG_ROCKCHIP_RV1126) += sdram_rv1126.o sdram_pctl_px30.o obj-$(CONFIG_ROCKCHIP_SDRAM_COMMON) += sdram_common.o diff --git a/drivers/ram/rockchip/sdram_rk3588.c b/drivers/ram/rockchip/sdram_rk3588.c new file mode 100644 index 0000000000..cf56e2a941 --- /dev/null +++ b/drivers/ram/rockchip/sdram_rk3588.c @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2021 Rockchip Electronics Co., Ltd. + */ + +#include <common.h> +#include <dm.h> +#include <ram.h> +#include <syscon.h> +#include <asm/arch-rockchip/clock.h> +#include <asm/arch-rockchip/grf_rk3588.h> +#include <asm/arch-rockchip/sdram.h> + +struct dram_info { + struct ram_info info; + struct rk3588_pmu1grf *pmugrf; +}; + +static int rk3588_dmc_probe(struct udevice *dev) +{ + struct dram_info *priv = dev_get_priv(dev); + + priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); + priv->info.base = CFG_SYS_SDRAM_BASE; + priv->info.size = + rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]) + + rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[4]); + + return 0; +} + +static int rk3588_dmc_get_info(struct udevice *dev, struct ram_info *info) +{ + struct dram_info *priv = dev_get_priv(dev); + + *info = priv->info; + + return 0; +} + +static struct ram_ops rk3588_dmc_ops = { + .get_info = rk3588_dmc_get_info, +}; + +static const struct udevice_id rk3588_dmc_ids[] = { + { .compatible = "rockchip,rk3588-dmc" }, + { } +}; + +U_BOOT_DRIVER(dmc_rk3588) = { + .name = "rockchip_rk3588_dmc", + .id = UCLASS_RAM, + .of_match = rk3588_dmc_ids, + .ops = &rk3588_dmc_ops, + .probe = rk3588_dmc_probe, + .priv_auto = sizeof(struct dram_info), +};