diff mbox series

[3/3] ARM: dts: stm32: Add timer interrupts on stm32mp15

Message ID 20221214162434.3.I55c811a8c5e305f772dac7f0337e23d37143c36a@changeid
State Accepted
Commit 6e391c7d5f36086b0babb555f38ac1848e188e13
Delegated to: Patrice Chotard
Headers show
Series [1/3] ARM: dts: stm32mp15: remove clksrc include in SCMI dtsi file | expand

Commit Message

Patrick Delaunay Dec. 14, 2022, 3:25 p.m. UTC
The timer units in the stm32mp15x CPUs have interrupts, depending on the
timer flavour either one "global" or four dedicated ones. Add the irqs
to the timer units on stm32mp15x.

Sync the DT Files with linux kernel v6.1 and with commit a9b70102253ce
("ARM: dts: stm32: Add timer interrupts on stm32mp15")

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
---

 arch/arm/dts/stm32mp151.dtsi | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

Comments

Patrice CHOTARD Dec. 15, 2022, 8:02 a.m. UTC | #1
On 12/14/22 16:25, Patrick Delaunay wrote:
> The timer units in the stm32mp15x CPUs have interrupts, depending on the
> timer flavour either one "global" or four dedicated ones. Add the irqs
> to the timer units on stm32mp15x.
> 
> Sync the DT Files with linux kernel v6.1 and with commit a9b70102253ce
> ("ARM: dts: stm32: Add timer interrupts on stm32mp15")
> 
> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
> ---
> 
>  arch/arm/dts/stm32mp151.dtsi | 34 ++++++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
> index f0fb022fc63e..27ea6a3d3d14 100644
> --- a/arch/arm/dts/stm32mp151.dtsi
> +++ b/arch/arm/dts/stm32mp151.dtsi
> @@ -145,6 +145,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40000000 0x400>;
> +			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM2_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 18 0x400 0x1>,
> @@ -178,6 +180,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40001000 0x400>;
> +			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM3_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 23 0x400 0x1>,
> @@ -212,6 +216,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40002000 0x400>;
> +			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM4_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 29 0x400 0x1>,
> @@ -244,6 +250,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40003000 0x400>;
> +			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM5_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 55 0x400 0x1>,
> @@ -278,6 +286,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40004000 0x400>;
> +			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM6_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 69 0x400 0x1>;
> @@ -296,6 +306,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40005000 0x400>;
> +			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM7_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 70 0x400 0x1>;
> @@ -314,6 +326,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40006000 0x400>;
> +			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM12_K>;
>  			clock-names = "int";
>  			status = "disabled";
> @@ -336,6 +350,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40007000 0x400>;
> +			interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM13_K>;
>  			clock-names = "int";
>  			status = "disabled";
> @@ -358,6 +374,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40008000 0x400>;
> +			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM14_K>;
>  			clock-names = "int";
>  			status = "disabled";
> @@ -641,6 +659,11 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44000000 0x400>;
> +			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "brk", "up", "trg-com", "cc";
>  			clocks = <&rcc TIM1_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 11 0x400 0x1>,
> @@ -677,6 +700,11 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44001000 0x400>;
> +			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "brk", "up", "trg-com", "cc";
>  			clocks = <&rcc TIM8_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 47 0x400 0x1>,
> @@ -764,6 +792,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44006000 0x400>;
> +			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM15_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 105 0x400 0x1>,
> @@ -791,6 +821,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44007000 0x400>;
> +			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM16_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 109 0x400 0x1>,
> @@ -815,6 +847,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44008000 0x400>;
> +			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM17_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 111 0x400 0x1>,
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

Thanks
Patrice
Patrice CHOTARD Jan. 12, 2023, 3:36 p.m. UTC | #2
HI Patrick

On 12/14/22 16:25, Patrick Delaunay wrote:
> The timer units in the stm32mp15x CPUs have interrupts, depending on the
> timer flavour either one "global" or four dedicated ones. Add the irqs
> to the timer units on stm32mp15x.
> 
> Sync the DT Files with linux kernel v6.1 and with commit a9b70102253ce
> ("ARM: dts: stm32: Add timer interrupts on stm32mp15")
> 
> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
> ---
> 
>  arch/arm/dts/stm32mp151.dtsi | 34 ++++++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
> index f0fb022fc63e..27ea6a3d3d14 100644
> --- a/arch/arm/dts/stm32mp151.dtsi
> +++ b/arch/arm/dts/stm32mp151.dtsi
> @@ -145,6 +145,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40000000 0x400>;
> +			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM2_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 18 0x400 0x1>,
> @@ -178,6 +180,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40001000 0x400>;
> +			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM3_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 23 0x400 0x1>,
> @@ -212,6 +216,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40002000 0x400>;
> +			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM4_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 29 0x400 0x1>,
> @@ -244,6 +250,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40003000 0x400>;
> +			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM5_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 55 0x400 0x1>,
> @@ -278,6 +286,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40004000 0x400>;
> +			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM6_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 69 0x400 0x1>;
> @@ -296,6 +306,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40005000 0x400>;
> +			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM7_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 70 0x400 0x1>;
> @@ -314,6 +326,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40006000 0x400>;
> +			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM12_K>;
>  			clock-names = "int";
>  			status = "disabled";
> @@ -336,6 +350,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40007000 0x400>;
> +			interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM13_K>;
>  			clock-names = "int";
>  			status = "disabled";
> @@ -358,6 +374,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40008000 0x400>;
> +			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM14_K>;
>  			clock-names = "int";
>  			status = "disabled";
> @@ -641,6 +659,11 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44000000 0x400>;
> +			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "brk", "up", "trg-com", "cc";
>  			clocks = <&rcc TIM1_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 11 0x400 0x1>,
> @@ -677,6 +700,11 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44001000 0x400>;
> +			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "brk", "up", "trg-com", "cc";
>  			clocks = <&rcc TIM8_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 47 0x400 0x1>,
> @@ -764,6 +792,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44006000 0x400>;
> +			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM15_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 105 0x400 0x1>,
> @@ -791,6 +821,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44007000 0x400>;
> +			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM16_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 109 0x400 0x1>,
> @@ -815,6 +847,8 @@
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44008000 0x400>;
> +			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM17_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 111 0x400 0x1>,
Applied to u-boot-stm32/master

Thanks
Patrice
diff mbox series

Patch

diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
index f0fb022fc63e..27ea6a3d3d14 100644
--- a/arch/arm/dts/stm32mp151.dtsi
+++ b/arch/arm/dts/stm32mp151.dtsi
@@ -145,6 +145,8 @@ 
 			#size-cells = <0>;
 			compatible = "st,stm32-timers";
 			reg = <0x40000000 0x400>;
+			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "global";
 			clocks = <&rcc TIM2_K>;
 			clock-names = "int";
 			dmas = <&dmamux1 18 0x400 0x1>,
@@ -178,6 +180,8 @@ 
 			#size-cells = <0>;
 			compatible = "st,stm32-timers";
 			reg = <0x40001000 0x400>;
+			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "global";
 			clocks = <&rcc TIM3_K>;
 			clock-names = "int";
 			dmas = <&dmamux1 23 0x400 0x1>,
@@ -212,6 +216,8 @@ 
 			#size-cells = <0>;
 			compatible = "st,stm32-timers";
 			reg = <0x40002000 0x400>;
+			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "global";
 			clocks = <&rcc TIM4_K>;
 			clock-names = "int";
 			dmas = <&dmamux1 29 0x400 0x1>,
@@ -244,6 +250,8 @@ 
 			#size-cells = <0>;
 			compatible = "st,stm32-timers";
 			reg = <0x40003000 0x400>;
+			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "global";
 			clocks = <&rcc TIM5_K>;
 			clock-names = "int";
 			dmas = <&dmamux1 55 0x400 0x1>,
@@ -278,6 +286,8 @@ 
 			#size-cells = <0>;
 			compatible = "st,stm32-timers";
 			reg = <0x40004000 0x400>;
+			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "global";
 			clocks = <&rcc TIM6_K>;
 			clock-names = "int";
 			dmas = <&dmamux1 69 0x400 0x1>;
@@ -296,6 +306,8 @@ 
 			#size-cells = <0>;
 			compatible = "st,stm32-timers";
 			reg = <0x40005000 0x400>;
+			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "global";
 			clocks = <&rcc TIM7_K>;
 			clock-names = "int";
 			dmas = <&dmamux1 70 0x400 0x1>;
@@ -314,6 +326,8 @@ 
 			#size-cells = <0>;
 			compatible = "st,stm32-timers";
 			reg = <0x40006000 0x400>;
+			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "global";
 			clocks = <&rcc TIM12_K>;
 			clock-names = "int";
 			status = "disabled";
@@ -336,6 +350,8 @@ 
 			#size-cells = <0>;
 			compatible = "st,stm32-timers";
 			reg = <0x40007000 0x400>;
+			interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "global";
 			clocks = <&rcc TIM13_K>;
 			clock-names = "int";
 			status = "disabled";
@@ -358,6 +374,8 @@ 
 			#size-cells = <0>;
 			compatible = "st,stm32-timers";
 			reg = <0x40008000 0x400>;
+			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "global";
 			clocks = <&rcc TIM14_K>;
 			clock-names = "int";
 			status = "disabled";
@@ -641,6 +659,11 @@ 
 			#size-cells = <0>;
 			compatible = "st,stm32-timers";
 			reg = <0x44000000 0x400>;
+			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "brk", "up", "trg-com", "cc";
 			clocks = <&rcc TIM1_K>;
 			clock-names = "int";
 			dmas = <&dmamux1 11 0x400 0x1>,
@@ -677,6 +700,11 @@ 
 			#size-cells = <0>;
 			compatible = "st,stm32-timers";
 			reg = <0x44001000 0x400>;
+			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "brk", "up", "trg-com", "cc";
 			clocks = <&rcc TIM8_K>;
 			clock-names = "int";
 			dmas = <&dmamux1 47 0x400 0x1>,
@@ -764,6 +792,8 @@ 
 			#size-cells = <0>;
 			compatible = "st,stm32-timers";
 			reg = <0x44006000 0x400>;
+			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "global";
 			clocks = <&rcc TIM15_K>;
 			clock-names = "int";
 			dmas = <&dmamux1 105 0x400 0x1>,
@@ -791,6 +821,8 @@ 
 			#size-cells = <0>;
 			compatible = "st,stm32-timers";
 			reg = <0x44007000 0x400>;
+			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "global";
 			clocks = <&rcc TIM16_K>;
 			clock-names = "int";
 			dmas = <&dmamux1 109 0x400 0x1>,
@@ -815,6 +847,8 @@ 
 			#size-cells = <0>;
 			compatible = "st,stm32-timers";
 			reg = <0x44008000 0x400>;
+			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "global";
 			clocks = <&rcc TIM17_K>;
 			clock-names = "int";
 			dmas = <&dmamux1 111 0x400 0x1>,