diff mbox series

[1/2] ARM: imx: bootaux: Fix macro misuse

Message ID 20221213044607.268450-1-marex@denx.de
State Accepted
Commit 4408cd6641175b6f7a10d4456d51495426ae4cd9
Delegated to: Stefano Babic
Headers show
Series [1/2] ARM: imx: bootaux: Fix macro misuse | expand

Commit Message

Marek Vasut Dec. 13, 2022, 4:46 a.m. UTC
There are no CONFIG_{TOOLS_,SPL_,TPL_,}IMX8M macros, nor is there one for
ARM64. Use plain IS_ENABLED(CONFIG_IMX8M) and IS_ENABLED(CONFIG_ARM64) to
avoid expanding the {TOOLS_,SPL_,TPL_,} part.

Fixes: 56c2dbdabab5 ("imx: bootaux: cleanup code")
Signed-off-by: Marek Vasut <marex@denx.de>
---
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Marek BehĂșn <kabel@kernel.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/mach-imx/imx_bootaux.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Peng Fan (OSS) Dec. 13, 2022, 7:41 a.m. UTC | #1
On 12/13/2022 12:46 PM, Marek Vasut wrote:
> There are no CONFIG_{TOOLS_,SPL_,TPL_,}IMX8M macros, nor is there one for
> ARM64. Use plain IS_ENABLED(CONFIG_IMX8M) and IS_ENABLED(CONFIG_ARM64) to
> avoid expanding the {TOOLS_,SPL_,TPL_,} part.
> 
> Fixes: 56c2dbdabab5 ("imx: bootaux: cleanup code")
> Signed-off-by: Marek Vasut <marex@denx.de>
> ---
> Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Marek BehĂșn <kabel@kernel.org>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
>   arch/arm/mach-imx/imx_bootaux.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c
> index 8115bf40f1a..433c1f80cee 100644
> --- a/arch/arm/mach-imx/imx_bootaux.c
> +++ b/arch/arm/mach-imx/imx_bootaux.c
> @@ -15,7 +15,7 @@
>   #include <cpu_func.h>
>   
>   /* Just to avoid build error */
> -#if CONFIG_IS_ENABLED(IMX8M)
> +#if IS_ENABLED(CONFIG_IMX8M)
>   #define SRC_M4C_NON_SCLR_RST_MASK	BIT(0)
>   #define SRC_M4_ENABLE_MASK		BIT(0)
>   #define SRC_M4_REG_OFFSET		0
> @@ -106,7 +106,7 @@ int arch_auxiliary_core_up(u32 core_id, ulong addr)
>   		if (!pc)
>   			return CMD_RET_FAILURE;
>   
> -		if (!CONFIG_IS_ENABLED(ARM64))
> +		if (!IS_ENABLED(CONFIG_ARM64))
>   			stack = 0x0;
>   	} else {
>   		/*
> @@ -128,7 +128,7 @@ int arch_auxiliary_core_up(u32 core_id, ulong addr)
>   	flush_dcache_all();
>   
>   	/* Enable M4 */
> -	if (CONFIG_IS_ENABLED(IMX8M)) {
> +	if (IS_ENABLED(CONFIG_IMX8M)) {
>   		arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0, 0, 0, 0, 0, NULL);
>   	} else {
>   		clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET,
> @@ -143,7 +143,7 @@ int arch_auxiliary_core_check_up(u32 core_id)
>   	struct arm_smccc_res res;
>   	unsigned int val;
>   
> -	if (CONFIG_IS_ENABLED(IMX8M)) {
> +	if (IS_ENABLED(CONFIG_IMX8M)) {
>   		arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0, 0, 0, 0, 0, &res);
>   		return res.a0;
>   	}

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Stefano Babic Jan. 31, 2023, 9:51 a.m. UTC | #2
> There are no CONFIG_{TOOLS_,SPL_,TPL_,}IMX8M macros, nor is there one for
> ARM64. Use plain IS_ENABLED(CONFIG_IMX8M) and IS_ENABLED(CONFIG_ARM64) to
> avoid expanding the {TOOLS_,SPL_,TPL_,} part.
> Fixes: 56c2dbdabab5 ("imx: bootaux: cleanup code")
> Signed-off-by: Marek Vasut <marex@denx.de>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c
index 8115bf40f1a..433c1f80cee 100644
--- a/arch/arm/mach-imx/imx_bootaux.c
+++ b/arch/arm/mach-imx/imx_bootaux.c
@@ -15,7 +15,7 @@ 
 #include <cpu_func.h>
 
 /* Just to avoid build error */
-#if CONFIG_IS_ENABLED(IMX8M)
+#if IS_ENABLED(CONFIG_IMX8M)
 #define SRC_M4C_NON_SCLR_RST_MASK	BIT(0)
 #define SRC_M4_ENABLE_MASK		BIT(0)
 #define SRC_M4_REG_OFFSET		0
@@ -106,7 +106,7 @@  int arch_auxiliary_core_up(u32 core_id, ulong addr)
 		if (!pc)
 			return CMD_RET_FAILURE;
 
-		if (!CONFIG_IS_ENABLED(ARM64))
+		if (!IS_ENABLED(CONFIG_ARM64))
 			stack = 0x0;
 	} else {
 		/*
@@ -128,7 +128,7 @@  int arch_auxiliary_core_up(u32 core_id, ulong addr)
 	flush_dcache_all();
 
 	/* Enable M4 */
-	if (CONFIG_IS_ENABLED(IMX8M)) {
+	if (IS_ENABLED(CONFIG_IMX8M)) {
 		arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0, 0, 0, 0, 0, NULL);
 	} else {
 		clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET,
@@ -143,7 +143,7 @@  int arch_auxiliary_core_check_up(u32 core_id)
 	struct arm_smccc_res res;
 	unsigned int val;
 
-	if (CONFIG_IS_ENABLED(IMX8M)) {
+	if (IS_ENABLED(CONFIG_IMX8M)) {
 		arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0, 0, 0, 0, 0, &res);
 		return res.a0;
 	}