From patchwork Wed Dec 7 13:14:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergiu Moga X-Patchwork-Id: 1713282 X-Patchwork-Delegate: eugen.hristev@microchip.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=dNslnu9a; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NRyXx44qtz23yq for ; Thu, 8 Dec 2022 00:18:57 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3519385650; Wed, 7 Dec 2022 14:17:59 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.b="dNslnu9a"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 9483285295; Wed, 7 Dec 2022 14:17:15 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id AA8588513E for ; Wed, 7 Dec 2022 14:17:11 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=Sergiu.Moga@microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1670419031; x=1701955031; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fDnoB1t8U8CmmQC8XTyA8J/B/Y+nccwJ17mm93ReXpo=; b=dNslnu9atCh0RxHpkK67t2u2s6eKndd44I0KNKoLnE1BVBMmdswTSpGk AzVdHEeEVx1V4DDucc6yraaA41Sd+4O0EiEmEgR6qE8tVbLjwEo6ZWtT8 SOxh4RGJ+CdSrxTMwDyd71ITc6m0Ery6AcuSo77bpQ3sdBQkfhRed1buy Yrfam10/TIFPT0UXBMVdMpygGPcJ7g0fsxWCDfzyqVg0L+ae+wAN5whmZ MuZo9KjlDf8GLNu9ClUJPDzw91bhWlh1c61dMP3luSGVRD8PucdRHoXQB pHPrOQWao1vKTNu7bM1ygUrQag8xS+xJb/QkVJTSxEUeFNM3a5Au2osxS A==; X-IronPort-AV: E=Sophos;i="5.96,225,1665471600"; d="scan'208";a="192068502" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 07 Dec 2022 06:17:09 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 7 Dec 2022 06:17:09 -0700 Received: from ROB-ULT-M68701.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Wed, 7 Dec 2022 06:17:04 -0700 From: Sergiu Moga To: , , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH 05/18] usb: ohci-at91: Enable OHCI functionality and register into DM Date: Wed, 7 Dec 2022 15:14:34 +0200 Message-ID: <20221207131447.40590-6-sergiu.moga@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221207131447.40590-1-sergiu.moga@microchip.com> References: <20221207131447.40590-1-sergiu.moga@microchip.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Register the OHCI driver into DM by properly initializing the required clocks and pins required by the DT node of OHCI. In order for the VBUS to stay enabled, a `child_pre_probe` method has been added to overcome the DM core disabling it in `usb_scan_device`: when the generic `device_probe` method is called, the pinctrl is processed once again, undoing whatever changes have been made in our driver's probe method. Signed-off-by: Sergiu Moga --- drivers/usb/host/ohci-at91.c | 182 +++++++++++++++++++++++++++++++++++ 1 file changed, 182 insertions(+) diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index 9b955c1bd6..362ab01c3d 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -7,6 +7,8 @@ #include #include +#if !(CONFIG_IS_ENABLED(DM_USB)) + int usb_cpu_init(void) { #ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB @@ -62,3 +64,183 @@ int usb_cpu_init_fail(void) { return usb_cpu_stop(); } + +#elif CONFIG_IS_ENABLED(DM_GPIO) + +#include +#include +#include +#include +#include "ohci.h" + +#define AT91_MAX_USBH_PORTS 3 + +#define at91_for_each_port(index) \ + for ((index) = 0; (index) < AT91_MAX_USBH_PORTS; (index)++) + +struct at91_usbh_data { + enum usb_init_type init_type; + struct gpio_desc vbus_pin[AT91_MAX_USBH_PORTS]; + u8 ports; /* number of ports on root hub */ +}; + +struct ohci_at91_priv { + struct clk *iclk; + struct clk *fclk; + struct clk *hclk; + bool clocked; +}; + +static void at91_start_clock(struct ohci_at91_priv *ohci_at91) +{ + if (ohci_at91->clocked) + return; + + clk_set_rate(ohci_at91->fclk, 48000000); + clk_prepare_enable(ohci_at91->hclk); + clk_prepare_enable(ohci_at91->iclk); + clk_prepare_enable(ohci_at91->fclk); + ohci_at91->clocked = true; +} + +static void at91_stop_clock(struct ohci_at91_priv *ohci_at91) +{ + if (!ohci_at91->clocked) + return; + + clk_disable_unprepare(ohci_at91->fclk); + clk_disable_unprepare(ohci_at91->iclk); + clk_disable_unprepare(ohci_at91->hclk); + ohci_at91->clocked = false; +} + +static void ohci_at91_set_power(struct at91_usbh_data *pdata, int port, + bool enable) +{ + if (!dm_gpio_is_valid(&pdata->vbus_pin[port])) + return; + + if (enable) + dm_gpio_set_dir_flags(&pdata->vbus_pin[port], + GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); + else + dm_gpio_set_dir_flags(&pdata->vbus_pin[port], 0); +} + +static void at91_start_hc(struct udevice *dev) +{ + struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev); + + at91_start_clock(ohci_at91); +} + +static void at91_stop_hc(struct udevice *dev) +{ + struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev); + + at91_stop_clock(ohci_at91); +} + +static int ohci_atmel_deregister(struct udevice *dev) +{ + struct at91_usbh_data *pdata = dev_get_plat(dev); + int i; + + at91_stop_hc(dev); + + at91_for_each_port(i) { + if (i >= pdata->ports) + break; + + ohci_at91_set_power(pdata, i, false); + } + + return ohci_deregister(dev); +} + +static int ohci_atmel_child_pre_probe(struct udevice *dev) +{ + struct udevice *ohci_controller = dev_get_parent(dev); + struct at91_usbh_data *pdata = dev_get_plat(ohci_controller); + int i; + + at91_for_each_port(i) { + if (i >= pdata->ports) + break; + + ohci_at91_set_power(pdata, i, true); + } + + return 0; +} + +static int ohci_atmel_probe(struct udevice *dev) +{ + struct at91_usbh_data *pdata = dev_get_plat(dev); + struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev); + int i; + int ret; + u32 ports; + struct ohci_regs *regs = (struct ohci_regs *)dev_read_addr(dev); + + if (!dev_read_u32(dev, "num-ports", &ports)) + pdata->ports = ports; + + at91_for_each_port(i) { + if (i >= pdata->ports) + break; + + gpio_request_by_name(dev, "atmel,vbus-gpio", i, + &pdata->vbus_pin[i], GPIOD_IS_OUT | + GPIOD_IS_OUT_ACTIVE); + } + + ohci_at91->iclk = devm_clk_get(dev, "ohci_clk"); + if (IS_ERR(ohci_at91->iclk)) { + ret = PTR_ERR(ohci_at91->iclk); + goto fail; + } + + ohci_at91->fclk = devm_clk_get(dev, "uhpck"); + if (IS_ERR(ohci_at91->fclk)) { + ret = PTR_ERR(ohci_at91->fclk); + goto fail; + } + + ohci_at91->hclk = devm_clk_get(dev, "hclk"); + if (IS_ERR(ohci_at91->hclk)) { + ret = PTR_ERR(ohci_at91->hclk); + goto fail; + } + + at91_start_hc(dev); + + return ohci_register(dev, regs); + +fail: + at91_for_each_port(i) + if (&pdata->vbus_pin[i]) + gpio_free(pdata->vbus_pin[i].offset); + + return ret; +} + +static const struct udevice_id ohci_usb_ids[] = { + { .compatible = "atmel,at91rm9200-ohci", }, + { } +}; + +U_BOOT_DRIVER(ohci_atmel) = { + .name = "ohci_atmel", + .id = UCLASS_USB, + .of_match = ohci_usb_ids, + .probe = ohci_atmel_probe, + .remove = ohci_atmel_deregister, + .child_pre_probe = ohci_atmel_child_pre_probe, + .ops = &ohci_usb_ops, + .plat_auto = sizeof(struct at91_usbh_data), + .priv_auto = sizeof(struct ohci_at91_priv), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; + +#endif /* CONFIG_IS_ENABLED(DM_USB) && CONFIG_IS_ENABLED(DM_GPIO) */