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[3/4] doc: README.socfpga: Update for U-boot 2022.04

Message ID 20221113135536.9920-3-jit.loon.lim@intel.com
State Needs Review / ACK, archived
Delegated to: Marek Vasut
Headers show
Series [1/4] makefile: tools: socfpgaimage: update padding flow | expand

Commit Message

Jit Loon Lim Nov. 13, 2022, 1:55 p.m. UTC
From: "Lokanathan, Raaj" <raaj.lokanathan@intel.com>

Update the tested Intel Quartus Software versions and highlight the
major changes in this U-boot version.

Signed-off-by: Lokanathan, Raaj <raaj.lokanathan@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
 doc/README.socfpga | 104 +++++++++++++++++++++++++++++++++++----------
 1 file changed, 82 insertions(+), 22 deletions(-)
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Patch

diff --git a/doc/README.socfpga b/doc/README.socfpga
index a469cc7e41..362361e014 100644
--- a/doc/README.socfpga
+++ b/doc/README.socfpga
@@ -15,6 +15,8 @@  Table of Contents
 	4. Cyclone V / Arria V generating the handoff header files for U-Boot SPL
 	5. Arria10 generating the handoff header files for U-Boot SPL
 	6. mkimage for Cyclone V, Arria V and Arria 10
+	7. SDRAM secure region in U-boot ATF flow
+	8. binman for U-boot ATF flow
 
 
 1. Device Family Support vs Tested Intel Quartus
@@ -22,19 +24,18 @@  Table of Contents
 
 	Processor			SOCFPGA Device Family		Intel Quartus Prime Pro Edition		Intel Quartus Prime Standard Edition	
 	--------------------------------------------------------------------------------------------------------------------------------------------
-	Dual-core ARM Cortex-A9		Cyclone V			N/A					20.1
-					Arria V				N/A					20.1
-					Arria 10			20.1, 20.3				20.1
+	Dual-core ARM Cortex-A9		Cyclone V			N/A					21.1
+					Arria 10			22.1					N/A
 
-	Quad-core ARM Cortex-A53	Stratix 10			20.1, 20.2, 20.3			N/A
-					Agilex				20.1, 20.2, 20.3			N/A
-					Diamond Mesa			Early access				N/A
+	Quad-core ARM Cortex-A53	Stratix 10			22.1					N/A
+					Agilex				22.1					N/A
+					eASIC N5X			22.1					N/A
 
 
 2. Feature Support
 ---------------------------------------------------------------------
 
-	Hardware Feature			Cyclone V	Arria 10	Stratix 10	Agilex		Diamond Mesa
+	Hardware Feature			Cyclone V	Arria 10	Stratix 10	Agilex		eASIC N5X
 						Arria V
 	--------------------------------------------------------------------------------------------------------------------
 	SDRAM					Yes		Yes		Yes		Yes		Yes
@@ -53,29 +54,23 @@  Table of Contents
 	Denali NAND controller			No		Yes		Yes		Yes		Yes
 	---------------------------------------------------------------------------------------------------------------------
 
-	Software Feature			Cyclone V	Arria 10	Stratix 10	Agilex		Diamond Mesa
+	Software Feature			Cyclone V	Arria 10	Stratix 10	Agilex		eASIC N5X
 						Arria V
 	---------------------------------------------------------------------------------------------------------------------
-	Remote System Update (RSU)		No		No		Yes		Yes		No
-	ARM Trusted Firmware (ATF)		No		No		Yes		Yes		Yes
+	Remote System Update (RSU) [1]		No		No		Yes		Yes		No
+	ARM Trusted Firmware (ATF) [2]		No		No		Yes		Yes		Yes
 	Vendor Authorized Boot (VAB)		No		No		No		No		Yes
 	---------------------------------------------------------------------------------------------------------------------
 
+	Notes:
+	[1] RSU SPT/CPB recovery features are supported with Quartus version 20.4 onwards
+	[2] ATF boot flow is supported with altera-opensource/arm-trusted-firmware branch:socfpga_v2.3 onwards
+
 
 3. Major Changes and Known Issues
 ---------------------------------------------------------------------
 
-	3.1 Support 'vab' command to perform vendor authentication.
-
-		Command format: vab addr len
-		Authorize 'len' bytes starting at 'addr' via vendor public key
-
-	3.2 Support SDRAM secure region in U-boot-ATF flow
-
-		First 1 MiB of SDRAM is configured as secure region, other
-		address spaces are non-secure regions. Only software executing
-		at secure state EL3 (eg: U-boot SPL) and secure masters are
-		allowed access to secure region.
+	3.1 Upgraded U-boot to version v2022.04
 
 
 4. Cyclone V / Arria V generating the handoff header files for U-Boot SPL
@@ -244,4 +239,69 @@  Table of Contents
 	Arria 10:
 	./tools/mkimage -T socfpgaimage_v1 -d spl/u-boot-spl.bin spl/u-boot-spl.sfp
 
-	For more inforation, run "./tools/mkimage --help".
\ No newline at end of file
+	For more inforation, run "./tools/mkimage --help".
+
+7. SDRAM secure region in U-boot ATF flow
+----------------------------------------------------------
+
+	In boot flow that uses ATF (ARM trusted firmware), the first 1 MiB of SDRAM
+	is configured as secure region, other address spaces are non-secure regions.
+	Only software executing	at secure state EL3 (eg: U-boot SPL, ATF) and secure
+	masters	are allowed access to the secure region.
+
+8. binman for U-boot ATF flow
+----------------------------------------------------------
+
+	Overview
+	~~~~~~~~
+
+	Before v2021.04, we provide *.sh/*.its for user to generate FIT image using
+	'mkimage' tool. To align with U-Boot community strategy to eliminate the custom
+	*.sh/*its script, we have removed all *.sh/*.its files and switched to use
+	'binman' tool to generate FIT image for all SOC64 devices (Stratix 10, Agilex,
+	eASIC N5X) started in U-boot version v2021.04.
+
+	FIT image content is defined in binman node in U-boot device tree (u-boot.dtb).
+	U-Boot v2021.04 support u-boot.itb and kernel.itb.
+
+	With "CONFIG_BINMAN" enabled in deconfig, U-boot will always run 'binman' tool
+	before end of the code compilation. If the required input files exists in U-boot
+	folder, *.itb files defined in u-boot.dtb will be generated. Otherwise, 'binman'
+	will not generate the *.itb files. You can run 'binman' tool manually via command
+	line to generate the *.itb file.
+
+	Input Files
+	~~~~~~~~~~~
+
+	Input files for *_atf_defconfig FIT image generation:
+		To generate u-boot.itb:
+		    u-boot-nodtb.bin
+		    u-boot.dtb
+		    bl31.bin
+		To generate kernel.itb:
+		    Image
+		    linux.dtb
+
+	Input files for *_vab_defconfig FIT image generation:
+		To generate u-boot.itb:
+		    signed-u-boot-nodtb.bin
+		    signed-u-boot.dtb
+		    signed-bl31.bin
+
+		To generate kernel.itb:
+		    signed-Image
+		    signed-linux.dtb
+
+	Command Line
+	~~~~~~~~~~~~
+
+	Please use the following commands to generate the u-boot.itb and kernel.itb:
+
+		$ <U-boot path>/tools/binman/binman build -u -d u-boot.dtb -O .
+			This command generate all FIT images that defined in device tree.
+
+		$ <U-boot path>/tools/binman/binman build -u -d u-boot.dtb -O . -i u-boot
+			This command generate u-boot.itb only.
+
+		$ <U-boot path>/tools/binman/binman build -u -d u-boot.dtb -O . -i kernel
+			This command generate kernel.itb only.
\ No newline at end of file