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Wed, 02 Nov 2022 23:36:27 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: u-boot@lists.denx.de, Jagan Teki , Jagan Teki Subject: [PATCH v3 02/25] ram: rockchip: Add common ddr type configs Date: Thu, 3 Nov 2022 12:05:24 +0530 Message-Id: <20221103063531.854326-3-jagan@edgeble.ai> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103063531.854326-1-jagan@edgeble.ai> References: <20221103063531.854326-1-jagan@edgeble.ai> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Jagan Teki We have common ddr types in rockchip or in general. So use the common ddr type names instead of per Rockchip SoC to avoid confusion. The respective ddr type names will use on the associated ddr SoC driver as these drivers are built per SoC at a time. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- Changes for v3: - collect Kever r-b Changes for v2: - none board/engicam/px30_core/Kconfig | 2 +- configs/khadas-edge-captain-rk3399_defconfig | 2 +- configs/khadas-edge-rk3399_defconfig | 2 +- configs/khadas-edge-v-rk3399_defconfig | 2 +- configs/leez-rk3399_defconfig | 2 +- configs/nanopi-r4s-rk3399_defconfig | 2 +- configs/pinebook-pro-rk3399_defconfig | 2 +- configs/roc-pc-mezzanine-rk3399_defconfig | 2 +- configs/roc-pc-rk3399_defconfig | 2 +- configs/rock-pi-4-rk3399_defconfig | 2 +- configs/rock-pi-4c-rk3399_defconfig | 2 +- configs/rockpro64-rk3399_defconfig | 2 +- drivers/ram/rockchip/Kconfig | 32 +++++++++----------- drivers/ram/rockchip/sdram_px30.c | 6 ++-- drivers/ram/rockchip/sdram_rk3399.c | 7 ++--- 15 files changed, 33 insertions(+), 36 deletions(-) diff --git a/board/engicam/px30_core/Kconfig b/board/engicam/px30_core/Kconfig index a03be78369..924c30f3e1 100644 --- a/board/engicam/px30_core/Kconfig +++ b/board/engicam/px30_core/Kconfig @@ -11,6 +11,6 @@ config SYS_CONFIG_NAME config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select RAM_PX30_DDR4 + select RAM_ROCKCHIP_DDR4 endif diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index 43aa3d9a4a..766fcbec01 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -53,7 +53,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index 467e478ea4..c17bdeb635 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -52,7 +52,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index a9d218a2ca..44ddebf7b8 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -53,7 +53,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig index a8326f03a2..f996c84a66 100644 --- a/configs/leez-rk3399_defconfig +++ b/configs/leez-rk3399_defconfig @@ -48,7 +48,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig index 2185f87d7d..27233c0a18 100644 --- a/configs/nanopi-r4s-rk3399_defconfig +++ b/configs/nanopi-r4s-rk3399_defconfig @@ -49,7 +49,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index fd6b05ee6d..9b2d0b0c0a 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -74,7 +74,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index 3cdcc729f8..6fca5f5a3d 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -67,7 +67,7 @@ CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y # CONFIG_RAM_ROCKCHIP_DEBUG is not set -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index e03442afa4..f59f36076e 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -64,7 +64,7 @@ CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y # CONFIG_RAM_ROCKCHIP_DEBUG is not set -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index 83721cedf3..97e0413b18 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -58,7 +58,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index ac9a3f9830..38d66f0deb 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -58,7 +58,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 09d4c9e72c..8687ad3c60 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -71,7 +71,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y diff --git a/drivers/ram/rockchip/Kconfig b/drivers/ram/rockchip/Kconfig index c29d5e8b38..67c63ecba0 100644 --- a/drivers/ram/rockchip/Kconfig +++ b/drivers/ram/rockchip/Kconfig @@ -11,9 +11,10 @@ config ROCKCHIP_SDRAM_COMMON help This enable sdram common driver +if RAM_ROCKCHIP + config RAM_ROCKCHIP_DEBUG bool "Rockchip ram drivers debugging" - depends on RAM_ROCKCHIP default y help This enables debugging ram driver API's for the platforms @@ -22,31 +23,28 @@ config RAM_ROCKCHIP_DEBUG This is an option for developers to understand the ram drivers initialization, configurations and etc. -config RAM_PX30_DDR4 - bool "DDR4 support for Rockchip PX30" - depends on RAM_ROCKCHIP && ROCKCHIP_PX30 +config RAM_ROCKCHIP_DDR4 + bool "DDR4 support for Rockchip SoCs" help This enables DDR4 sdram support instead of the default DDR3 support - on Rockchip PC30 SoCs. + on Rockchip SoCs. -config RAM_PX30_LPDDR2 - bool "LPDDR2 support for Rockchip PX30" - depends on RAM_ROCKCHIP && ROCKCHIP_PX30 +config RAM_ROCKCHIP_LPDDR2 + bool "LPDDR2 support for Rockchip SoCs" help This enables LPDDR2 sdram support instead of the default DDR3 support - on Rockchip PC30 SoCs. + on Rockchip SoCs. -config RAM_PX30_LPDDR3 - bool "LPDDR3 support for Rockchip PX30" - depends on RAM_ROCKCHIP && ROCKCHIP_PX30 +config RAM_ROCKCHIP_LPDDR3 + bool "LPDDR3 support for Rockchip SoCs" help This enables LPDDR3 sdram support instead of the default DDR3 support - on Rockchip PC30 SoCs. + on Rockchip SoCs. -config RAM_RK3399_LPDDR4 - bool "LPDDR4 support for Rockchip RK3399" - depends on RAM_ROCKCHIP && ROCKCHIP_RK3399 +config RAM_ROCKCHIP_LPDDR4 + bool "LPDDR4 support for Rockchip SoCs" help This enables LPDDR4 sdram code support for the platforms based - on Rockchip RK3399 SoC. + on Rockchip SoCs. +endif # RAM_ROCKCHIP diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c index c024a0cd63..357fe2432a 100644 --- a/drivers/ram/rockchip/sdram_px30.c +++ b/drivers/ram/rockchip/sdram_px30.c @@ -125,11 +125,11 @@ u32 addrmap[][8] = { struct dram_info dram_info; struct px30_sdram_params sdram_configs[] = { -#if defined(CONFIG_RAM_PX30_DDR4) +#if defined(CONFIG_RAM_ROCKCHIP_DDR4) #include "sdram-px30-ddr4-detect-333.inc" -#elif defined(CONFIG_RAM_PX30_LPDDR2) +#elif defined(CONFIG_RAM_ROCKCHIP_LPDDR2) #include "sdram-px30-lpddr2-detect-333.inc" -#elif defined(CONFIG_RAM_PX30_LPDDR3) +#elif defined(CONFIG_RAM_ROCKCHIP_LPDDR3) #include "sdram-px30-lpddr3-detect-333.inc" #else #include "sdram-px30-ddr3-detect-333.inc" diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index cbf502bd0e..ce49a91393 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -1625,7 +1625,7 @@ static void set_ddr_stride(struct rk3399_pmusgrf_regs *pmusgrf, u32 stride) rk_clrsetreg(&pmusgrf->soc_con4, 0x1f << 10, stride << 10); } -#if !defined(CONFIG_RAM_RK3399_LPDDR4) +#if !defined(CONFIG_RAM_ROCKCHIP_LPDDR4) static int data_training_first(struct dram_info *dram, u32 channel, u8 rank, struct rk3399_sdram_params *params) { @@ -2558,8 +2558,7 @@ static int lpddr4_set_rate(struct dram_info *dram, return 0; } - -#endif /* CONFIG_RAM_RK3399_LPDDR4 */ +#endif /* CONFIG_RAM_ROCKCHIP_LPDDR4 */ /* CS0,n=1 * CS1,n=2 @@ -3059,7 +3058,7 @@ static int conv_of_plat(struct udevice *dev) #endif static const struct sdram_rk3399_ops rk3399_ops = { -#if !defined(CONFIG_RAM_RK3399_LPDDR4) +#if !defined(CONFIG_RAM_ROCKCHIP_LPDDR4) .data_training_first = data_training_first, .set_rate_index = switch_to_phy_index1, .modify_param = modify_param,