diff mbox series

clk: change return type of clk_get_parent_rate from long long to ulong

Message ID 20220928103757.11870-1-msuchanek@suse.de
State Accepted
Delegated to: Sean Anderson
Headers show
Series clk: change return type of clk_get_parent_rate from long long to ulong | expand

Commit Message

Michal Suchánek Sept. 28, 2022, 10:37 a.m. UTC
All functions getting and setting clock rate use ulong for rate, only
clk_get_parent_rate is an exception. Change the return value to match
other clock rate funcrions.

Most users directly assign the rate to unsigned long anyway, and the few
users that use u64 (not s64) multiply the rate so they may need the
extra bits for the result in their use case.

Fixes: 4aa78300a0 ("dm: clk: Define clk_get_parent_rate() for clk operations")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
---

 drivers/clk/clk-uclass.c | 2 +-
 include/clk.h            | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

Comments

Sean Anderson Sept. 28, 2022, 4:21 p.m. UTC | #1
On 9/28/22 06:37, Michal Suchanek wrote:
> All functions getting and setting clock rate use ulong for rate, only
> clk_get_parent_rate is an exception. Change the return value to match
> other clock rate funcrions.
> 
> Most users directly assign the rate to unsigned long anyway, and the few
> users that use u64 (not s64) multiply the rate so they may need the
> extra bits for the result in their use case.
> 
> Fixes: 4aa78300a0 ("dm: clk: Define clk_get_parent_rate() for clk operations")
> Signed-off-by: Michal Suchanek <msuchanek@suse.de>
> ---
> 
>   drivers/clk/clk-uclass.c | 2 +-
>   include/clk.h            | 4 ++--
>   2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
> index b89c77bf79..4678ed43af 100644
> --- a/drivers/clk/clk-uclass.c
> +++ b/drivers/clk/clk-uclass.c
> @@ -505,7 +505,7 @@ struct clk *clk_get_parent(struct clk *clk)
>   	return pclk;
>   }
>   
> -long long clk_get_parent_rate(struct clk *clk)
> +ulong clk_get_parent_rate(struct clk *clk)
>   {
>   	const struct clk_ops *ops;
>   	struct clk *pclk;
> diff --git a/include/clk.h b/include/clk.h
> index 76bb64bb5e..41a8fb3419 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -444,7 +444,7 @@ struct clk *clk_get_parent(struct clk *clk);
>    *
>    * Return: clock rate in Hz, or -ve error code.
>    */
> -long long clk_get_parent_rate(struct clk *clk);
> +ulong clk_get_parent_rate(struct clk *clk);
>   
>   /**
>    * clk_round_rate() - Adjust a rate to the exact rate a clock can provide
> @@ -577,7 +577,7 @@ static inline struct clk *clk_get_parent(struct clk *clk)
>   	return ERR_PTR(-ENOSYS);
>   }
>   
> -static inline long long clk_get_parent_rate(struct clk *clk)
> +static inline ulong clk_get_parent_rate(struct clk *clk)
>   {
>   	return -ENOSYS;
>   }

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Simon Glass Sept. 28, 2022, 4:27 p.m. UTC | #2
On Wed, 28 Sept 2022 at 04:38, Michal Suchanek <msuchanek@suse.de> wrote:
>
> All functions getting and setting clock rate use ulong for rate, only
> clk_get_parent_rate is an exception. Change the return value to match
> other clock rate funcrions.
>
> Most users directly assign the rate to unsigned long anyway, and the few
> users that use u64 (not s64) multiply the rate so they may need the
> extra bits for the result in their use case.
>
> Fixes: 4aa78300a0 ("dm: clk: Define clk_get_parent_rate() for clk operations")
> Signed-off-by: Michal Suchanek <msuchanek@suse.de>
> ---
>
>  drivers/clk/clk-uclass.c | 2 +-
>  include/clk.h            | 4 ++--
>  2 files changed, 3 insertions(+), 3 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson Oct. 19, 2022, 11:51 p.m. UTC | #3
On Wed, 28 Sep 2022 12:37:57 +0200, Michal Suchanek wrote:
> All functions getting and setting clock rate use ulong for rate, only
> clk_get_parent_rate is an exception. Change the return value to match
> other clock rate funcrions.
> 
> Most users directly assign the rate to unsigned long anyway, and the few
> users that use u64 (not s64) multiply the rate so they may need the
> extra bits for the result in their use case.
> 
> [...]

Applied, thanks!

[1/1] clk: change return type of clk_get_parent_rate from long long to ulong
      commit: bf3afe148ecbc34f096c5f08c7168c64159299d9

Best regards,
diff mbox series

Patch

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index b89c77bf79..4678ed43af 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -505,7 +505,7 @@  struct clk *clk_get_parent(struct clk *clk)
 	return pclk;
 }
 
-long long clk_get_parent_rate(struct clk *clk)
+ulong clk_get_parent_rate(struct clk *clk)
 {
 	const struct clk_ops *ops;
 	struct clk *pclk;
diff --git a/include/clk.h b/include/clk.h
index 76bb64bb5e..41a8fb3419 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -444,7 +444,7 @@  struct clk *clk_get_parent(struct clk *clk);
  *
  * Return: clock rate in Hz, or -ve error code.
  */
-long long clk_get_parent_rate(struct clk *clk);
+ulong clk_get_parent_rate(struct clk *clk);
 
 /**
  * clk_round_rate() - Adjust a rate to the exact rate a clock can provide
@@ -577,7 +577,7 @@  static inline struct clk *clk_get_parent(struct clk *clk)
 	return ERR_PTR(-ENOSYS);
 }
 
-static inline long long clk_get_parent_rate(struct clk *clk)
+static inline ulong clk_get_parent_rate(struct clk *clk)
 {
 	return -ENOSYS;
 }