From patchwork Thu Sep 22 06:47:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Marty E. Plummer" X-Patchwork-Id: 1680925 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=startmail.com header.i=@startmail.com header.a=rsa-sha256 header.s=2020-07 header.b=YtpqVDsO; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MY5Sv25ztz1ypH for ; Thu, 22 Sep 2022 16:47:59 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0E23F84CB6; Thu, 22 Sep 2022 08:47:32 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=startmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=startmail.com header.i=@startmail.com header.b="YtpqVDsO"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 7B25384CC5; Thu, 22 Sep 2022 08:47:28 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mx-out2.startmail.com (mx-out2.startmail.com [145.131.90.155]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id D2F0D84CBD for ; Thu, 22 Sep 2022 08:47:24 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=startmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=hanetzer@startmail.com From: "Marty E. Plummer" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=startmail.com; s=2020-07; t=1663829243; bh=Cm0oJ0kDSjJVgqvoN2SoHXlanYKFIWZQJJ7qcsvl8M0=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:From:Subject:To:Date:Sender: Content-Type:Content-Transfer-Encoding:Content-Disposition: Mime-Version:Reply-To:In-Reply-To:References:Message-Id:Autocrypt; b=YtpqVDsO33T4X+sPmkAYcbFp2cw/oDOyRAwquSX12eozvCuBAJWxHGJ4kbOa5he3R KQJc/+dk+6+cqQAOY5X6wRW12etLBOZyWKqUnc2gkczjInh28jhxLVKgDDyzVQB7cS ONa5Y2HSNM+prk1Gq7VLZO8+p2JdawthQ++bBTscLeG63k2WVaRjR1SPqEu1aDIvv1 db1Sws5a6oggjynVKTTNrpAm8AOOmW4dh6iwbMRqHEPUUNLAeM+7WRsiOel5xKVh38 Bl+GTFvJe8+X6I6q7pgvl+nTYV5Wrz7UIWIa/xZJltcLD2xK0cYUsxM30ErY6XSRJq ovX/t7IRj8S3w== To: U-Boot Mailing List Cc: Simon Glass , Kever Yang , Philipp Tomsich , "Marty E. Plummer" , Artem Lapkin , Philipp Tomsich , Quentin Schulz , Xavier Drudis Ferran , linux-rockchip@lists.infradead.org Subject: [RFC PATCH 4/4] rockchip: rk3399: attempt to redirect uart2dbga to sdcard Date: Thu, 22 Sep 2022 01:47:03 -0500 Message-Id: <20220922064704.1740759-5-hanetzer@startmail.com> In-Reply-To: <20220922064704.1740759-1-hanetzer@startmail.com> References: <20220922064704.1740759-1-hanetzer@startmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean The meat of my problem. rk3399 has the ability to redirect uart2 to sdcard pins. This setup half works; I can push input into the uart, but not see output. Signed-off-by: Marty E. Plummer --- arch/arm/dts/rk3399-gru.dtsi | 7 ++----- arch/arm/dts/rk3399.dtsi | 4 ++-- .../arm/include/asm/arch-rockchip/grf_rk3399.h | 3 +++ arch/arm/mach-rockchip/rk3399/rk3399.c | 18 +++++++++--------- 4 files changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm/dts/rk3399-gru.dtsi b/arch/arm/dts/rk3399-gru.dtsi index b80f19066b..8c87c1cf19 100644 --- a/arch/arm/dts/rk3399-gru.dtsi +++ b/arch/arm/dts/rk3399-gru.dtsi @@ -510,7 +510,7 @@ ap_i2c_audio: &i2c8 { }; &sdmmc { - status = "okay"; + status = "disabled"; /* * Note: configure "sdmmc_cd" as card detect even though it's actually @@ -520,14 +520,11 @@ ap_i2c_audio: &i2c8 { * turned on that the system will still make sure the port is * configured as SDMMC and not JTAG. */ - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_cd_pin - &sdmmc_bus4>; bus-width = <4>; cap-mmc-highspeed; cap-sd-highspeed; - cd-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; + // cd-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; disable-wp; sd-uhs-sdr12; sd-uhs-sdr25; diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi index 3871c7fd83..55d5ee15be 100644 --- a/arch/arm/dts/rk3399.dtsi +++ b/arch/arm/dts/rk3399.dtsi @@ -638,7 +638,7 @@ reg-shift = <2>; reg-io-width = <4>; pinctrl-names = "default"; - pinctrl-0 = <&uart2c_xfer>; + pinctrl-0 = <&uart2a_xfer>; status = "disabled"; }; @@ -2571,7 +2571,7 @@ uart2a_xfer: uart2a-xfer { rockchip,pins = <4 RK_PB0 2 &pcfg_pull_up>, - <4 RK_PB1 2 &pcfg_pull_none>; + <4 RK_PB1 2 &pcfg_pull_up>; }; }; diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h index 658cc0dfc4..e1bfa31af7 100644 --- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h @@ -554,6 +554,9 @@ enum { /* GRF_SOC_CON7 */ GRF_UART_DBG_SEL_SHIFT = 10, GRF_UART_DBG_SEL_MASK = 3 << GRF_UART_DBG_SEL_SHIFT, + // assumptions, none of this is documented in the TRM as far as I can see + GRF_UART_DBG_SEL_A = 0, + GRF_UART_DBG_SEL_B = 1, GRF_UART_DBG_SEL_C = 2, /* GRF_SOC_CON20 */ diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 21db03b961..7d35e524dc 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -157,17 +157,17 @@ void board_debug_uart_init(void) GPIO_PULL_NORMAL); } - /* Enable early UART2 channel C on the RK3399 */ - rk_clrsetreg(&grf->gpio4c_iomux, - GRF_GPIO4C3_SEL_MASK, - GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT); - rk_clrsetreg(&grf->gpio4c_iomux, - GRF_GPIO4C4_SEL_MASK, - GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT); - /* Set channel C as UART2 input */ + /* Enable early UART2 channel A on the RK3399 */ + rk_clrsetreg(&grf->gpio4b_iomux, + GRF_GPIO4B0_SEL_MASK, + GRF_UART2DBGA_SIN << GRF_GPIO4B0_SEL_SHIFT); + rk_clrsetreg(&grf->gpio4b_iomux, + GRF_GPIO4B1_SEL_MASK, + GRF_UART2DBGA_SOUT << GRF_GPIO4B0_SEL_SHIFT); + /* Set channel A as UART2 input */ rk_clrsetreg(&grf->soc_con7, GRF_UART_DBG_SEL_MASK, - GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT); + GRF_UART_DBG_SEL_A << GRF_UART_DBG_SEL_SHIFT); #endif } #endif