diff mbox series

[3/8] arch: arm: dts: HSD #1508104447-5: arm: dts: socfpga: stratix10: Add NAND IP to base dts

Message ID 20220911161032.23861-3-jit.loon.lim@intel.com
State Needs Review / ACK, archived
Delegated to: Marek Vasut
Headers show
Series [1/8] configs: HSD #1508104447-2: configs: socfpga: stratix10: Enable CONFIG_CMD_MTD | expand

Commit Message

Jit Loon Lim Sept. 11, 2022, 4:10 p.m. UTC 
From: Ley Foon Tan <ley.foon.tan@intel.com>

Add NAND node to stratix10 base dtsi file.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
 arch/arm/dts/socfpga_stratix10.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi
index 7a7777202c..9f3dbf615e 100755
--- a/arch/arm/dts/socfpga_stratix10.dtsi
+++ b/arch/arm/dts/socfpga_stratix10.dtsi
@@ -232,6 +232,18 @@ 
 			status = "disabled";
 		};
 
+		nand: nand@ffb90000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "altr,socfpga-denali-nand";
+			reg = <0xffb90000 0x10000>,
+			      <0xffb80000 0x1000>;
+			reg-names = "nand_data", "denali_reg";
+			interrupts = <0 97 4>;
+			resets = <&rst NAND_RESET>, <&rst NAND_OCP_RESET>;
+			status = "disabled";
+		};
+
 		ocram: sram@ffe00000 {
 			compatible = "mmio-sram";
 			reg = <0xffe00000 0x100000>;