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[2/3] ram: rk3399: Fix faulty frequency change reports

Message ID 20220811075848.1791050-3-lee@kernel.org
State Accepted
Commit daef678cffb9fb387c44d45d827d2b8ea199eb5b
Delegated to: Kever Yang
Headers show
Series rockchip: Fix RAM training on RK3399 based platforms (Rock Pi 4) | expand

Commit Message

Lee Jones Aug. 11, 2022, 7:58 a.m. UTC 
Frequency changes to 400MHz are presently reported as:

  lpddr4_set_rate_0: change freq to 400000000 mhz 0, 1

This is obviously wrong by 6 orders of magnitude.

Ensure frequency changes are reported accurately.

Signed-off-by: Lee Jones <lee@kernel.org>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
 drivers/ram/rockchip/sdram_rk3399.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 0af0fa9e7b..34d6c93f95 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -2552,8 +2552,8 @@  static int lpddr4_set_rate(struct dram_info *dram,
 			       dfs_cfgs_lpddr4[ctl_fn].base.ddr_freq);
 
 		if (IS_ENABLED(CONFIG_RAM_ROCKCHIP_DEBUG))
-			printf("%s: change freq to %d mhz %d, %d\n", __func__,
-			       dfs_cfgs_lpddr4[ctl_fn].base.ddr_freq,
+			printf("%s: change freq to %dMHz %d, %d\n", __func__,
+			       dfs_cfgs_lpddr4[ctl_fn].base.ddr_freq / MHz,
 			       ctl_fn, phy_fn);
 	}