diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 8bef63cbb7..9af0133f10 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -14,6 +14,7 @@ choice
 
 config TARGET_MALTA
 	bool "Support malta"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select BOARD_EARLY_INIT_R
 	select DM
 	select DM_SERIAL
@@ -41,17 +42,20 @@ config TARGET_MALTA
 
 config ARCH_ATH79
 	bool "Support QCA/Atheros ath79"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select DM
 	select OF_CONTROL
 	imply CMD_DM
 
 config ARCH_MSCC
 	bool "Support MSCC VCore-III"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select OF_CONTROL
 	select DM
 
 config ARCH_BMIPS
 	bool "Support BMIPS SoCs"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select CLK
 	select CPU
 	select DM
@@ -62,6 +66,7 @@ config ARCH_BMIPS
 
 config ARCH_MTMIPS
 	bool "Support MediaTek MIPS platforms"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select CLK
 	imply CMD_DM
 	select DISPLAY_CPUINFO
@@ -88,6 +93,7 @@ config ARCH_MTMIPS
 config ARCH_JZ47XX
 	bool "Support Ingenic JZ47xx"
 	select SUPPORT_SPL
+	select HAS_FIXED_TIMER_FREQUENCY
 	select OF_CONTROL
 	select DM
 
@@ -116,12 +122,14 @@ config ARCH_OCTEON
 
 config MACH_PIC32
 	bool "Support Microchip PIC32"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select DM
 	select OF_CONTROL
 	imply CMD_DM
 
 config TARGET_BOSTON
 	bool "Support Boston"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select DM
 	imply DM_EVENT
 	select DM_SERIAL
@@ -143,6 +151,7 @@ config TARGET_BOSTON
 
 config TARGET_XILFPGA
 	bool "Support Imagination Xilfpga"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select DM
 	select DM_ETH
 	select DM_GPIO
@@ -246,6 +255,12 @@ config ROM_EXCEPTION_VECTORS
 	  Disable this, if the U-Boot image is booted from DRAM (e.g. by SPL).
 	  In that case the image size will be reduced by 0x500 bytes.
 
+config SYS_MIPS_TIMER_FREQ
+	int "Fixed MIPS CPU timer frequency in Hz"
+	depends on HAS_FIXED_TIMER_FREQUENCY
+	help
+	  Configures a fixed CPU timer frequency.
+
 config MIPS_CM_BASE
 	hex "MIPS CM GCR Base Address"
 	depends on MIPS_CM
@@ -427,6 +442,9 @@ config SUPPORTS_CPU_MIPS64_R6
 config SUPPORTS_CPU_MIPS64_OCTEON
 	bool
 
+config HAS_FIXED_TIMER_FREQUENCY
+	bool
+
 config CPU_CAVIUM_OCTEON
 	bool
 
diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig
index e522a3f4c0..5450807f29 100644
--- a/configs/ap121_defconfig
+++ b/configs/ap121_defconfig
@@ -10,6 +10,7 @@ CONFIG_DEBUG_UART_CLOCK=25000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ARCH_ATH79=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80100000
 CONFIG_SYS_MEMTEST_END=0x83f00000
diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig
index 4bdcea3060..7cdc88d33b 100644
--- a/configs/ap143_defconfig
+++ b/configs/ap143_defconfig
@@ -12,6 +12,7 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ARCH_ATH79=y
 CONFIG_TARGET_AP143=y
+CONFIG_SYS_MIPS_TIMER_FREQ=325000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80100000
 CONFIG_SYS_MEMTEST_END=0x83f00000
diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig
index adcc6c54a8..dce30d441a 100644
--- a/configs/ap152_defconfig
+++ b/configs/ap152_defconfig
@@ -12,6 +12,7 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ARCH_ATH79=y
 CONFIG_TARGET_AP152=y
+CONFIG_SYS_MIPS_TIMER_FREQ=375000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80100000
 CONFIG_SYS_MEMTEST_END=0x83f00000
diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig
index 0475535e99..510b966437 100644
--- a/configs/bcm968380gerg_ram_defconfig
+++ b/configs/bcm968380gerg_ram_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="brcm,bcm968380gerg"
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6838=y
+CONFIG_SYS_MIPS_TIMER_FREQ=160000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig
index 2be57d2d1e..f60ca172ec 100644
--- a/configs/boston32r2_defconfig
+++ b/configs/boston32r2_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="img,boston"
 CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig
index 524564355f..fd5eac0e13 100644
--- a/configs/boston32r2el_defconfig
+++ b/configs/boston32r2el_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="img,boston"
 CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig
index 7bb4e692d6..63e2e97ea0 100644
--- a/configs/boston32r6_defconfig
+++ b/configs/boston32r6_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS32_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig
index 8ae2f235b1..ee1a6679b6 100644
--- a/configs/boston32r6el_defconfig
+++ b/configs/boston32r6el_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS32_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig
index 4a41e6b5cc..19144585b9 100644
--- a/configs/boston64r2_defconfig
+++ b/configs/boston64r2_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig
index 0670ffabbb..fa62ad76a4 100644
--- a/configs/boston64r2el_defconfig
+++ b/configs/boston64r2el_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig
index bf7f709524..1111df5668 100644
--- a/configs/boston64r6_defconfig
+++ b/configs/boston64r6_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS64_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig
index e1d46d3060..5c6a1cb668 100644
--- a/configs/boston64r6el_defconfig
+++ b/configs/boston64r6el_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS64_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig
index 07848a5933..65d9045ec7 100644
--- a/configs/ci20_mmc_defconfig
+++ b/configs/ci20_mmc_defconfig
@@ -13,6 +13,7 @@ CONFIG_SPL_MMC=y
 CONFIG_SPL=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ARCH_JZ47XX=y
+CONFIG_SYS_MIPS_TIMER_FREQ=1200000000
 CONFIG_FIT=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS4,115200 rw rootwait root=/dev/mmcblk0p1"
diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig
index 36eab571ea..75cef92acc 100644
--- a/configs/comtrend_ar5315u_ram_defconfig
+++ b/configs/comtrend_ar5315u_ram_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u"
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6318=y
+CONFIG_SYS_MIPS_TIMER_FREQ=166500000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig
index 68969c0413..fc477b9872 100644
--- a/configs/comtrend_ar5387un_ram_defconfig
+++ b/configs/comtrend_ar5387un_ram_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5387un"
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6328=y
+CONFIG_SYS_MIPS_TIMER_FREQ=160000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig
index cb2caf4543..9d6cf49fb5 100644
--- a/configs/comtrend_ct5361_ram_defconfig
+++ b/configs/comtrend_ct5361_ram_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="comtrend,ct-5361"
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6348=y
+CONFIG_SYS_MIPS_TIMER_FREQ=128000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig
index 138d3c84ba..c3b9e2982e 100644
--- a/configs/comtrend_vr3032u_ram_defconfig
+++ b/configs/comtrend_vr3032u_ram_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="comtrend,vr-3032u"
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM63268=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig
index b7174ff5ee..46e01980e5 100644
--- a/configs/comtrend_wap5813n_ram_defconfig
+++ b/configs/comtrend_wap5813n_ram_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n"
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6368=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig
index b9ee281be9..af67a730d4 100644
--- a/configs/gardena-smart-gateway-mt7688_defconfig
+++ b/configs/gardena-smart-gateway-mt7688_defconfig
@@ -17,6 +17,7 @@ CONFIG_ENV_OFFSET_REDUND=0xB0000
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7628=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig
index 2b5a587141..4ad9c4d1a8 100644
--- a/configs/huawei_hg556a_ram_defconfig
+++ b/configs/huawei_hg556a_ram_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="huawei,hg556a"
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6358=y
+CONFIG_SYS_MIPS_TIMER_FREQ=150000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/imgtec_xilfpga_defconfig b/configs/imgtec_xilfpga_defconfig
index 51c7e500dc..01ec605814 100644
--- a/configs/imgtec_xilfpga_defconfig
+++ b/configs/imgtec_xilfpga_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x4000
 CONFIG_DEFAULT_DEVICE_TREE="nexys4ddr"
 CONFIG_SYS_LOAD_ADDR=0x80500000
 CONFIG_TARGET_XILFPGA=y
+CONFIG_SYS_MIPS_TIMER_FREQ=50000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig
index a129679e9d..0bdb4e612c 100644
--- a/configs/linkit-smart-7688_defconfig
+++ b/configs/linkit-smart-7688_defconfig
@@ -15,6 +15,7 @@ CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7628=y
 CONFIG_BOARD_LINKIT_SMART_7688=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig
index e55b4a4914..1954dd3263 100644
--- a/configs/malta64_defconfig
+++ b/configs/malta64_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff81000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBE3E0000
 CONFIG_TARGET_MALTA=y
 CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 # CONFIG_AUTOBOOT is not set
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_MISC_INIT_R=y
diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig
index 6c6492d3fe..e93bbdedf2 100644
--- a/configs/malta64el_defconfig
+++ b/configs/malta64el_defconfig
@@ -10,6 +10,7 @@ CONFIG_ENV_ADDR=0xFFFFFFFFBE3E0000
 CONFIG_TARGET_MALTA=y
 CONFIG_BUILD_TARGET="u-boot-swap.bin"
 CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_SYS_LITTLE_ENDIAN=y
 # CONFIG_AUTOBOOT is not set
 CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/malta_defconfig b/configs/malta_defconfig
index 3aff68b018..0f993309c2 100644
--- a/configs/malta_defconfig
+++ b/configs/malta_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="mti,malta"
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ENV_ADDR=0xBE3E0000
 CONFIG_TARGET_MALTA=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 # CONFIG_AUTOBOOT is not set
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_MISC_INIT_R=y
diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig
index e268fb6374..0a47eb4a4b 100644
--- a/configs/maltael_defconfig
+++ b/configs/maltael_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ENV_ADDR=0xBE3E0000
 CONFIG_TARGET_MALTA=y
 CONFIG_BUILD_TARGET="u-boot-swap.bin"
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_SYS_LITTLE_ENDIAN=y
 # CONFIG_AUTOBOOT is not set
 CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig
index b2e1a8e826..81d22b0051 100644
--- a/configs/mscc_jr2_defconfig
+++ b/configs/mscc_jr2_defconfig
@@ -13,6 +13,7 @@ CONFIG_ENV_OFFSET_REDUND=0x140000
 CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
 CONFIG_SOC_JR2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80000000
 CONFIG_SYS_MEMTEST_END=0x9fc00000
diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig
index 8eebe7b314..3ccc625506 100644
--- a/configs/mscc_luton_defconfig
+++ b/configs/mscc_luton_defconfig
@@ -14,6 +14,7 @@ CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
 CONFIG_SOC_LUTON=y
 CONFIG_DDRTYPE_MT47H128M8HQ=y
+CONFIG_SYS_MIPS_TIMER_FREQ=208333333
 CONFIG_MIPS_BOOT_FDT=y
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80000000
diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig
index 6ba9311626..660fa56b3f 100644
--- a/configs/mscc_ocelot_defconfig
+++ b/configs/mscc_ocelot_defconfig
@@ -12,6 +12,7 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_ENV_OFFSET_REDUND=0x140000
 CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80000000
 CONFIG_SYS_MEMTEST_END=0x9fc00000
diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig
index 1b9096682f..4f06f5d098 100644
--- a/configs/mscc_serval_defconfig
+++ b/configs/mscc_serval_defconfig
@@ -11,6 +11,7 @@ CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
 CONFIG_SOC_SERVAL=y
 CONFIG_DDRTYPE_H5TQ1G63BFA=y
+CONFIG_SYS_MIPS_TIMER_FREQ=208333333
 CONFIG_SYS_MEMTEST_START=0x80000000
 CONFIG_SYS_MEMTEST_END=0x87c00000
 CONFIG_SYS_LITTLE_ENDIAN=y
diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig
index ca358e666a..ad834f398c 100644
--- a/configs/mscc_servalt_defconfig
+++ b/configs/mscc_servalt_defconfig
@@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET_REDUND=0x140000
 CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
 CONFIG_SOC_SERVALT=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_SYS_MEMTEST_START=0x80000000
 CONFIG_SYS_MEMTEST_END=0x9fc00000
 CONFIG_SYS_LITTLE_ENDIAN=y
diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig
index 8c64bb740a..96f10926b1 100644
--- a/configs/mt7620_mt7530_rfb_defconfig
+++ b/configs/mt7620_mt7530_rfb_defconfig
@@ -16,6 +16,7 @@ CONFIG_DEBUG_UART_CLOCK=40000000
 CONFIG_SYS_LOAD_ADDR=0x80010000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_BOARD_MT7620_MT7530_RFB=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig
index 2aa6eb7e26..d96da91df3 100644
--- a/configs/mt7620_rfb_defconfig
+++ b/configs/mt7620_rfb_defconfig
@@ -15,6 +15,7 @@ CONFIG_DEBUG_UART_BASE=0xb0000c00
 CONFIG_DEBUG_UART_CLOCK=40000000
 CONFIG_SYS_LOAD_ADDR=0x80010000
 CONFIG_ARCH_MTMIPS=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/configs/mt7621_nand_rfb_defconfig b/configs/mt7621_nand_rfb_defconfig
index 0ad4849eb2..ee30f48fc3 100644
--- a/configs/mt7621_nand_rfb_defconfig
+++ b/configs/mt7621_nand_rfb_defconfig
@@ -15,6 +15,7 @@ CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7621=y
 CONFIG_MT7621_BOOT_FROM_NAND=y
 CONFIG_BOARD_MT7621_NAND_RFB=y
+CONFIG_SYS_MIPS_TIMER_FREQ=440000000
 # CONFIG_MIPS_CACHE_SETUP is not set
 # CONFIG_MIPS_CACHE_DISABLE is not set
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/configs/mt7621_rfb_defconfig b/configs/mt7621_rfb_defconfig
index fa66364817..9987cc5769 100644
--- a/configs/mt7621_rfb_defconfig
+++ b/configs/mt7621_rfb_defconfig
@@ -13,6 +13,7 @@ CONFIG_DEBUG_UART_CLOCK=50000000
 CONFIG_SYS_LOAD_ADDR=0x83000000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7621=y
+CONFIG_SYS_MIPS_TIMER_FREQ=440000000
 # CONFIG_MIPS_CACHE_SETUP is not set
 # CONFIG_MIPS_CACHE_DISABLE is not set
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig
index 14fc8b05e3..0e100fca49 100644
--- a/configs/mt7628_rfb_defconfig
+++ b/configs/mt7628_rfb_defconfig
@@ -15,6 +15,7 @@ CONFIG_SYS_LOAD_ADDR=0x80010000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7628=y
 CONFIG_BOARD_MT7628_RFB=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig
index 4336116f57..860ef11384 100644
--- a/configs/netgear_cg3100d_ram_defconfig
+++ b/configs/netgear_cg3100d_ram_defconfig
@@ -7,6 +7,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="netgear,cg3100d"
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
+CONFIG_SYS_MIPS_TIMER_FREQ=166500000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig
index 73de5ed15b..ff4ac67d6b 100644
--- a/configs/netgear_dgnd3700v2_ram_defconfig
+++ b/configs/netgear_dgnd3700v2_ram_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="netgear,dgnd3700v2"
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6362=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig
index a912ea638f..53c596dbcb 100644
--- a/configs/pic32mzdask_defconfig
+++ b/configs/pic32mzdask_defconfig
@@ -7,6 +7,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="pic32mzda_sk"
 CONFIG_SYS_LOAD_ADDR=0x88500000
 CONFIG_MACH_PIC32=y
+CONFIG_SYS_MIPS_TIMER_FREQ=100000000
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
 CONFIG_SYS_MEMTEST_START=0x88000000
diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig
index 875ae210de..1b989df466 100644
--- a/configs/sagem_f@st1704_ram_defconfig
+++ b/configs/sagem_f@st1704_ram_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sagem,f@st1704"
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6338=y
+CONFIG_SYS_MIPS_TIMER_FREQ=120000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig
index df008b797f..0f564befa7 100644
--- a/configs/sfr_nb4-ser_ram_defconfig
+++ b/configs/sfr_nb4-ser_ram_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6358=y
 CONFIG_BOARD_SFR_NB4_SER=y
+CONFIG_SYS_MIPS_TIMER_FREQ=150000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig
index 40dc2c158e..c6ecc38595 100644
--- a/configs/tplink_wdr4300_defconfig
+++ b/configs/tplink_wdr4300_defconfig
@@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300"
 CONFIG_SYS_LOAD_ADDR=0xa1000000
 CONFIG_ARCH_ATH79=y
 CONFIG_BOARD_TPLINK_WDR4300=y
+CONFIG_SYS_MIPS_TIMER_FREQ=280000000
 CONFIG_SYS_MEMTEST_START=0x80100000
 CONFIG_SYS_MEMTEST_END=0x83f00000
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig
index b362d549a2..98429a69a7 100644
--- a/configs/vocore2_defconfig
+++ b/configs/vocore2_defconfig
@@ -16,6 +16,7 @@ CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7628=y
 CONFIG_BOARD_VOCORE2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/include/configs/ap121.h b/include/configs/ap121.h
index 61cc073a8a..650140bb72 100644
--- a/include/configs/ap121.h
+++ b/include/configs/ap121.h
@@ -6,8 +6,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ      200000000
-
 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 
 #define CONFIG_SYS_INIT_RAM_ADDR        0xbd000000
diff --git a/include/configs/ap143.h b/include/configs/ap143.h
index 579b9b4f2c..0eed8db23b 100644
--- a/include/configs/ap143.h
+++ b/include/configs/ap143.h
@@ -6,8 +6,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ      325000000
-
 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 
 #define CONFIG_SYS_INIT_RAM_ADDR        0xbd000000
diff --git a/include/configs/ap152.h b/include/configs/ap152.h
index 283762fd22..7124711119 100644
--- a/include/configs/ap152.h
+++ b/include/configs/ap152.h
@@ -6,8 +6,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ      375000000
-
 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 
 #define CONFIG_SYS_INIT_RAM_ADDR        0xbd000000
diff --git a/include/configs/bmips_bcm3380.h b/include/configs/bmips_bcm3380.h
index 66c23cd1d7..c328f41420 100644
--- a/include/configs/bmips_bcm3380.h
+++ b/include/configs/bmips_bcm3380.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	166500000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h
index 55c1d439d5..d16d50e5ec 100644
--- a/include/configs/bmips_bcm6318.h
+++ b/include/configs/bmips_bcm6318.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	166500000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm63268.h b/include/configs/bmips_bcm63268.h
index f046b7e662..f69c46b11c 100644
--- a/include/configs/bmips_bcm63268.h
+++ b/include/configs/bmips_bcm63268.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6328.h b/include/configs/bmips_bcm6328.h
index 7e488072ed..acd021ecad 100644
--- a/include/configs/bmips_bcm6328.h
+++ b/include/configs/bmips_bcm6328.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	160000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6338.h b/include/configs/bmips_bcm6338.h
index ddaa540513..c4d92db999 100644
--- a/include/configs/bmips_bcm6338.h
+++ b/include/configs/bmips_bcm6338.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	120000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h
index f704fe26ca..208a86a79d 100644
--- a/include/configs/bmips_bcm6348.h
+++ b/include/configs/bmips_bcm6348.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	128000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h
index 9aaa694cad..c098588db1 100644
--- a/include/configs/bmips_bcm6358.h
+++ b/include/configs/bmips_bcm6358.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	150000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6362.h b/include/configs/bmips_bcm6362.h
index 34e542544c..6e707d341b 100644
--- a/include/configs/bmips_bcm6362.h
+++ b/include/configs/bmips_bcm6362.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h
index 0319124a0e..d6ff1bcb35 100644
--- a/include/configs/bmips_bcm6368.h
+++ b/include/configs/bmips_bcm6368.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6838.h b/include/configs/bmips_bcm6838.h
index 481dfc20b3..a1c992b7a6 100644
--- a/include/configs/bmips_bcm6838.h
+++ b/include/configs/bmips_bcm6838.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	160000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/boston.h b/include/configs/boston.h
index 8b04492753..953112b5d9 100644
--- a/include/configs/boston.h
+++ b/include/configs/boston.h
@@ -13,7 +13,6 @@
 /*
  * CPU
  */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	30000000
 
 /*
  * PCI
diff --git a/include/configs/ci20.h b/include/configs/ci20.h
index 7e8a9fcb80..d094fb594f 100644
--- a/include/configs/ci20.h
+++ b/include/configs/ci20.h
@@ -9,9 +9,6 @@
 #ifndef __CONFIG_CI20_H__
 #define __CONFIG_CI20_H__
 
-/* Ingenic JZ4780 clock configuration. */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	1200000000
-
 /* Memory configuration */
 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
 
diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h
index d21a9b9383..e1079a5e68 100644
--- a/include/configs/gardena-smart-gateway-mt7688.h
+++ b/include/configs/gardena-smart-gateway-mt7688.h
@@ -6,9 +6,6 @@
 #ifndef __CONFIG_GARDENA_SMART_GATEWAY_H
 #define __CONFIG_GARDENA_SMART_GATEWAY_H
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/imgtec_xilfpga.h b/include/configs/imgtec_xilfpga.h
index 599b0c50de..1fc45f9060 100644
--- a/include/configs/imgtec_xilfpga.h
+++ b/include/configs/imgtec_xilfpga.h
@@ -15,8 +15,6 @@
 /*--------------------------------------------
  * CPU configuration
  */
-/* CPU Timer rate */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	50000000
 
 /*----------------------------------------------------------------------
  * Memory Layout
diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h
index 2e077dd516..1f4e0b0f86 100644
--- a/include/configs/linkit-smart-7688.h
+++ b/include/configs/linkit-smart-7688.h
@@ -6,9 +6,6 @@
 #ifndef __CONFIG_LINKIT_SMART_7688_H
 #define __CONFIG_LINKIT_SMART_7688_H
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/malta.h b/include/configs/malta.h
index 717867d12a..2e7c34e243 100644
--- a/include/configs/malta.h
+++ b/include/configs/malta.h
@@ -18,7 +18,6 @@
 /*
  * CPU Configuration
  */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	250000000
 
 /*
  * Memory map
diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h
index 049d9a1b55..ee8d40ddce 100644
--- a/include/configs/mt7620.h
+++ b/include/configs/mt7620.h
@@ -8,8 +8,6 @@
 #ifndef __CONFIG_MT7620_H
 #define __CONFIG_MT7620_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
 #define CONFIG_SYS_INIT_SP_OFFSET	0x400000
diff --git a/include/configs/mt7621.h b/include/configs/mt7621.h
index 1f68997080..554c435842 100644
--- a/include/configs/mt7621.h
+++ b/include/configs/mt7621.h
@@ -8,8 +8,6 @@
 #ifndef __CONFIG_MT7621_H
 #define __CONFIG_MT7621_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ	440000000
-
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
 #define CONFIG_VERY_BIG_RAM
diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h
index 3680c0fe44..402e772729 100644
--- a/include/configs/mt7628.h
+++ b/include/configs/mt7628.h
@@ -8,8 +8,6 @@
 #ifndef __CONFIG_MT7628_H
 #define __CONFIG_MT7628_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
 #define CONFIG_SYS_INIT_SP_OFFSET	0x80000
diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h
index 0a07c9c29c..9d796f9f34 100644
--- a/include/configs/pic32mzdask.h
+++ b/include/configs/pic32mzdask.h
@@ -13,8 +13,6 @@
 /*--------------------------------------------
  * CPU configuration
  */
-/* CPU Timer rate */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	100000000
 
 /*----------------------------------------------------------------------
  * Memory Layout
diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h
index 1400a211e3..b14726ad23 100644
--- a/include/configs/tplink_wdr4300.h
+++ b/include/configs/tplink_wdr4300.h
@@ -6,8 +6,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ	280000000
-
 #define CONFIG_SYS_SDRAM_BASE		0xa0000000
 
 #define CONFIG_SYS_INIT_RAM_ADDR	0xbd000000
diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h
index 5c5036b8be..02ddc6fb6e 100644
--- a/include/configs/vcoreiii.h
+++ b/include/configs/vcoreiii.h
@@ -12,11 +12,6 @@
 
 #define CONFIG_SYS_INIT_SP_OFFSET       0x400000
 
-#if defined(CONFIG_SOC_LUTON) || defined(CONFIG_SOC_SERVAL)
-#define CONFIG_SYS_MIPS_TIMER_FREQ	208333333
-#else
-#define CONFIG_SYS_MIPS_TIMER_FREQ	250000000
-#endif
 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_MIPS_TIMER_FREQ
 
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h
index 6a7a0832c9..970c275839 100644
--- a/include/configs/vocore2.h
+++ b/include/configs/vocore2.h
@@ -6,9 +6,6 @@
 #ifndef __VOCORE2_CONFIG_H__
 #define __VOCORE2_CONFIG_H__
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 5f4972ab95..27bf0c4722 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1024,7 +1024,6 @@ CONFIG_SYS_MEMORY_SIZE
 CONFIG_SYS_MEM_RESERVE_SECURE
 CONFIG_SYS_MEM_SIZE
 CONFIG_SYS_MFD
-CONFIG_SYS_MIPS_TIMER_FREQ
 CONFIG_SYS_MMC_CD_PIN
 CONFIG_SYS_MMC_CLK_OD
 CONFIG_SYS_MMC_MAX_BLK_COUNT
