From patchwork Mon Jun 6 23:43:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 1639706 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LH98H73K2z9sFk for ; Tue, 7 Jun 2022 09:45:03 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 83BF584335; Tue, 7 Jun 2022 01:44:09 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=csgraf.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 6EDF884262; Tue, 7 Jun 2022 01:43:50 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.2 Received: from zulu616.server4you.de (mail.csgraf.de [85.25.223.15]) by phobos.denx.de (Postfix) with ESMTP id 256BF842D1 for ; Tue, 7 Jun 2022 01:43:42 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=csgraf.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=agraf@csgraf.de Received: from localhost.localdomain (dynamic-077-002-002-002.77.2.pool.telefonica.de [77.2.2.2]) by csgraf.de (Postfix) with ESMTPSA id 988B96080EF1; Tue, 7 Jun 2022 01:43:41 +0200 (CEST) From: Alexander Graf To: u-boot@lists.denx.de Cc: Heinrich Schuchardt , Anatolij Gustschin , Simon Glass , Matthias Brugger , Da Xue Subject: [PATCH 6/6] video: Only dcache flush damaged lines Date: Tue, 7 Jun 2022 01:43:36 +0200 Message-Id: <20220606234336.5021-7-agraf@csgraf.de> X-Mailer: git-send-email 2.32.1 (Apple Git-133) In-Reply-To: <20220606234336.5021-1-agraf@csgraf.de> References: <20220606234336.5021-1-agraf@csgraf.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Now that we have a damage area tells us which parts of the frame buffer actually need updating, let's only dcache flush those on video_sync() calls. With this optimization in place, frame buffer updates - especially on large screen such as 4k displays - speed up significantly. Signed-off-by: Alexander Graf Reported-by: Da Xue --- drivers/video/video-uclass.c | 49 ++++++++++++++++++++++++++++++------ 1 file changed, 42 insertions(+), 7 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index 9ac1974670..5661beea38 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -222,6 +222,39 @@ int video_damage(struct udevice *vid, int x, int y, int width, int height) } #endif +#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) +static void video_flush_dcache(struct udevice *vid) +{ + struct video_priv *priv = dev_get_uclass_priv(vid); + + if (!priv->flush_dcache) + return; + +#ifdef CONFIG_VIDEO_DAMAGE + if (priv->damage.endx && priv->damage.endy) { + int lstart = priv->damage.x * VNBYTES(priv->bpix); + int lend = priv->damage.endx * VNBYTES(priv->bpix); + int y; + + for (y = priv->damage.y; y < priv->damage.endy; y++) { + ulong fb = (ulong)priv->fb; + ulong start = fb + (y * priv->line_length) + lstart; + ulong end = start + lend; + + start = ALIGN_DOWN(start, CONFIG_SYS_CACHELINE_SIZE); + end = ALIGN(end, CONFIG_SYS_CACHELINE_SIZE); + + flush_dcache_range(start, end); + } + } +#else + flush_dcache_range((ulong)priv->fb, + ALIGN((ulong)priv->fb + priv->fb_size, + CONFIG_SYS_CACHELINE_SIZE)); +#endif +} +#endif + /* Flush video activity to the caches */ int video_sync(struct udevice *vid, bool force) { @@ -240,13 +273,7 @@ int video_sync(struct udevice *vid, bool force) * out whether it exists? For now, ARM is safe. */ #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) - struct video_priv *priv = dev_get_uclass_priv(vid); - - if (priv->flush_dcache) { - flush_dcache_range((ulong)priv->fb, - ALIGN((ulong)priv->fb + priv->fb_size, - CONFIG_SYS_CACHELINE_SIZE)); - } + video_flush_dcache(vid); #elif defined(CONFIG_VIDEO_SANDBOX_SDL) struct video_priv *priv = dev_get_uclass_priv(vid); static ulong last_sync; @@ -256,6 +283,14 @@ int video_sync(struct udevice *vid, bool force) last_sync = get_timer(0); } #endif + +#ifdef CONFIG_VIDEO_DAMAGE + struct video_priv *priv = dev_get_uclass_priv(vid); + + priv->damage.endx = 0; + priv->damage.endy = 0; +#endif + return 0; }