From patchwork Tue May 31 08:15:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Maniyam, Dinesh" X-Patchwork-Id: 1637361 X-Patchwork-Delegate: simon.k.r.goldschmidt@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=QdWfjbwi; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LCBh947BYz9s1l for ; Tue, 31 May 2022 22:40:25 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 22A0B8426A; Tue, 31 May 2022 14:39:29 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="QdWfjbwi"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 052A7842C6; Tue, 31 May 2022 10:15:32 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 9D832840D8 for ; Tue, 31 May 2022 10:15:28 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dinesh.maniyam@intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653984928; x=1685520928; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=AfRGo+rQMNzAzqccdeN4/oJmNsgyLlZkFdHnLE9qo5c=; b=QdWfjbwikTBxwUm5iQmytC6QRy2rbiFYrjO2uSbQ9YvosxNMMuVSbvUs QhOIRvlH/bgHLwxGgUifHuRFU/oTMnHJ/GGXE5JsZv97AiupFrxfvkbdB UjA7P2RG9pe4H35Q+tdSi44qs1EjSPPcZcrOdMMf1sANXY0QUApMVtSwC j2gPS4QPGPXiKBtYzqgJlgF8+xeqN8F7T1O6TOPbbSxzY1jC5h/TGB1Pp X7wcKnwM/UGrVWd5lnZc1bRB62v70nwdxmzEOf5C8b4kRBIp7Gy4iY16J PR4jBbYai8XzqQuD4rjeTg0bjfqGmiCOmiOQ4HP+njKGxLeisCwEhB5cI A==; X-IronPort-AV: E=McAfee;i="6400,9594,10363"; a="262813528" X-IronPort-AV: E=Sophos;i="5.91,264,1647327600"; d="scan'208";a="262813528" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 May 2022 01:15:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,264,1647327600"; d="scan'208";a="666821428" Received: from pglc00514.png.intel.com ([10.221.239.206]) by FMSMGA003.fm.intel.com with ESMTP; 31 May 2022 01:15:22 -0700 From: dinesh.maniyam@intel.com To: u-boot@lists.denx.de Cc: Tien Fong Chee , Kok Kiang , Yau Wai , Sin Hui , Raaj , Dinesh Subject: [PATCH] arm: dts: socfpga: stratix10: Add freeze controller node Date: Tue, 31 May 2022 16:15:17 +0800 Message-Id: <20220531081517.25025-1-dinesh.maniyam@intel.com> X-Mailer: git-send-email 2.19.0 MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 31 May 2022 14:39:03 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Dinesh Maniyam The freeze controller is required for FPGA partial reconfig. This node is disable on default. Enable this node via u-boot fdt command when needed. Signed-off-by: Yau Wai Gan Signed-off-by: Dinesh Maniyam Reviewed-by: Tien Fong Chee --- arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi index 61df425f14..75a29045da 100755 --- a/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi @@ -2,7 +2,7 @@ /* * U-Boot additions * - * Copyright (C) 2019-2020 Intel Corporation + * Copyright (C) 2019-2022 Intel Corporation */ #include "socfpga_stratix10-u-boot.dtsi" @@ -10,6 +10,15 @@ /{ aliases { spi0 = &qspi; + freeze_br0 = &freeze_controller; + }; + + soc { + freeze_controller: freeze_controller@f9000450 { + compatible = "altr,freeze-bridge-controller"; + reg = <0xf9000450 0x00000010>; + status = "disabled"; + }; }; };