diff mbox series

[V2,06/12] configs: imx8qm/qxp_evk: drop unused SDHC macro

Message ID 20220415042416.23611-7-peng.fan@oss.nxp.com
State Accepted
Commit ee5e8ee471e21633f02ea7a9ef17cdb1d30369ca
Delegated to: Stefano Babic
Headers show
Series configs: clean up SDHC marco and MMCROOT | expand

Commit Message

Peng Fan (OSS) April 15, 2022, 4:23 a.m. UTC 
From: Peng Fan <peng.fan@nxp.com>

With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
 CONFIG_SYS_FSL_USDHC_NUM
 CONFIG_SYS_FSL_ESDHC_ADDR

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 include/configs/imx8qm_mek.h  | 5 -----
 include/configs/imx8qxp_mek.h | 5 -----
 2 files changed, 10 deletions(-)

Comments

Stefano Babic April 22, 2022, 8:47 a.m. UTC | #1 
> From: Peng Fan <peng.fan@nxp.com>
> With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
>  CONFIG_SYS_FSL_USDHC_NUM
>  CONFIG_SYS_FSL_ESDHC_ADDR
> Reviewed-by: Fabio Estevam <festevam@denx.de>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic
diff mbox series

Patch

diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h
index 0fe38e61c4b..8a269225778 100644
--- a/include/configs/imx8qm_mek.h
+++ b/include/configs/imx8qm_mek.h
@@ -29,10 +29,6 @@ 
 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
-#define CONFIG_SYS_FSL_ESDHC_ADDR       0
-#define USDHC1_BASE_ADDR                0x5B010000
-#define USDHC2_BASE_ADDR                0x5B020000
-
 #ifdef CONFIG_AHAB_BOOT
 #define AHAB_ENV "sec_boot=yes\0"
 #else
@@ -122,7 +118,6 @@ 
 
 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
 #define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
-#define CONFIG_SYS_FSL_USDHC_NUM	2
 
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 #define PHYS_SDRAM_1			0x80000000
diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h
index beb35c93435..01577932884 100644
--- a/include/configs/imx8qxp_mek.h
+++ b/include/configs/imx8qxp_mek.h
@@ -27,10 +27,6 @@ 
 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif
 
-#define CONFIG_SYS_FSL_ESDHC_ADDR       0
-#define USDHC1_BASE_ADDR                0x5B010000
-#define USDHC2_BASE_ADDR                0x5B020000
-
 #ifdef CONFIG_AHAB_BOOT
 #define AHAB_ENV "sec_boot=yes\0"
 #else
@@ -120,7 +116,6 @@ 
 
 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
 #define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
-#define CONFIG_SYS_FSL_USDHC_NUM	2
 
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 #define PHYS_SDRAM_1			0x80000000