@@ -7,11 +7,6 @@ CONFIG_FEC_MXC
CONFIG_MII
Must be defined if CONFIG_FEC_MXC is defined.
-CONFIG_FEC_XCV_TYPE
- Defaults to MII100 for 100 Base-tx.
- RGMII selects 1000 Base-tx reduced pin count interface.
- RMII selects 100 Base-tx reduced pin count interface.
-
CONFIG_FEC_MXC_SWAP_PACKET
Forced on iff MX28.
Swaps the bytes order of all words(4 byte units) in the packet.
@@ -54,10 +54,6 @@ DECLARE_GLOBAL_DATA_PTR;
#error "CONFIG_MII has to be defined!"
#endif
-#ifndef CONFIG_FEC_XCV_TYPE
-#define CONFIG_FEC_XCV_TYPE MII100
-#endif
-
/*
* The i.MX28 operates with packets in big endian. We need to swap them before
* sending and after receiving.
@@ -1269,9 +1265,9 @@ static int fecmxc_probe(struct udevice *dev)
priv->xcv_type = RGMII;
break;
default:
- priv->xcv_type = CONFIG_FEC_XCV_TYPE;
- printf("Unsupported interface type %d defaulting to %d\n",
- priv->interface, priv->xcv_type);
+ priv->xcv_type = MII100;
+ printf("Unsupported interface type %d defaulting to MII100\n",
+ priv->interface);
break;
}
@@ -122,7 +122,6 @@
#define CONFIG_FEC_ENET_DEV 0
#define IMX_FEC_BASE 0x5b040000
#define CONFIG_FEC_MXC_PHYADDR 0x4
-#define CONFIG_FEC_XCV_TYPE RGMII
#define PHY_ANEG_TIMEOUT 20000
#endif /* __APALIS_IMX8X_H */
@@ -21,8 +21,6 @@
#define CONSOLE_DEV "ttymxc0"
#endif
-#define CONFIG_FEC_XCV_TYPE RGMII
-
/* Framebuffer */
#define CONFIG_SYS_LDB_CLOCK 28341000
@@ -87,7 +87,6 @@ BUR_COMMON_ENV \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Ethernet */
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_FIXED_SPEED _1000BASET
/* USB Configs */
@@ -32,9 +32,6 @@
#define CONFIG_FACTORYSET
-/* ENET Config */
-#define CONFIG_FEC_XCV_TYPE RMII
-
/* ENET1 connects to base board and MUX with ESAI */
#define CONFIG_FEC_ENET_DEV 1
#define CONFIG_FEC_MXC_PHYADDR 0x0
@@ -136,7 +136,6 @@
/* Networking */
#define CONFIG_FEC_MXC_PHYADDR -1
-#define CONFIG_FEC_XCV_TYPE RGMII
#define FEC_QUIRK_ENET_MAC
#endif /* __CGTQMX8_H */
@@ -13,7 +13,6 @@
#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
/* Network */
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
/* ENET1 */
@@ -147,7 +147,6 @@
/* Ethernet */
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_FEC_XCV_TYPE RGMII
#define IMX_FEC_BASE ENET_BASE_ADDR
/* USB */
@@ -32,7 +32,6 @@
/* FEC ethernet */
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 7
/* MMC Configs */
@@ -23,7 +23,6 @@
/* Ethernet Configs */
-#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -151,7 +151,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
@@ -105,7 +105,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
/* FEC*/
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
#define IMX_FEC_BASE 0x30BE0000
@@ -83,7 +83,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
@@ -101,7 +101,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
/* FEC */
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
@@ -122,7 +122,6 @@
/* ENET Config */
#if defined(CONFIG_FEC_MXC)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
#define IMX_FEC_BASE 0x30BE0000
@@ -34,11 +34,6 @@
#include <config_distro_bootcmd.h>
-/* ENET */
-#if defined(CONFIG_FEC_MXC)
-#define CONFIG_FEC_XCV_TYPE RGMII
-#endif /* CONFIG_FEC_MXC */
-
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
@@ -97,7 +97,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
/* FEC */
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
@@ -33,7 +33,6 @@
#endif
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 1
#define FEC_QUIRK_ENET_MAC
@@ -58,7 +58,6 @@
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 4
#define FEC_QUIRK_ENET_MAC
@@ -38,7 +38,6 @@
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
@@ -32,7 +32,6 @@
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
@@ -133,7 +133,4 @@
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
-/* Networking */
-#define CONFIG_FEC_XCV_TYPE RGMII
-
#endif /* __IMX8QM_MEK_H */
@@ -127,8 +127,5 @@
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
-/* Networking */
-#define CONFIG_FEC_XCV_TYPE RGMII
-
#include <linux/stringify.h>
#endif /* __IMX8QM_ROM7720_H */
@@ -136,9 +136,6 @@
#define CONFIG_PCA953X
#endif
-/* Networking */
-#define CONFIG_FEC_XCV_TYPE RGMII
-
/* Misc configuration */
#define CONFIG_SYS_CBSIZE 2048
#define CONFIG_SYS_MAXARGS 64
@@ -31,7 +31,6 @@
#if defined(CONFIG_FEC_MXC)
#define PHY_ANEG_TIMEOUT 20000
-#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 1
#define IMX_FEC_BASE 0x29950000
@@ -37,7 +37,6 @@
/* ENET1 Config */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
@@ -115,7 +115,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0
-#define CONFIG_FEC_XCV_TYPE RMII
#endif
#endif
@@ -72,7 +72,6 @@
#define IMX_FEC_BASE FEC_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0
#define CONFIG_DISCOVER_PHY
-#define CONFIG_FEC_XCV_TYPE RMII
#endif
#define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
@@ -101,8 +101,6 @@
#define IMX_FEC_BASE ENET2_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0
-#define CONFIG_FEC_XCV_TYPE RGMII
-
#ifdef CONFIG_CMD_USB
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
@@ -129,8 +129,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x1
-#define CONFIG_FEC_XCV_TYPE RGMII
-
#ifdef CONFIG_CMD_USB
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
@@ -137,11 +137,9 @@
#if (CONFIG_FEC_ENET_DEV == 0)
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x2
-#define CONFIG_FEC_XCV_TYPE RMII
#elif (CONFIG_FEC_ENET_DEV == 1)
#define IMX_FEC_BASE ENET2_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x1
-#define CONFIG_FEC_XCV_TYPE RMII
#endif
#endif
@@ -94,13 +94,6 @@
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
/* Default baudrate can be overridden by board! */
-/* FEC Ethernet on SoC */
-#ifdef CONFIG_FEC_MXC
-#ifndef CONFIG_FEC_XCV_TYPE
-#define CONFIG_FEC_XCV_TYPE RMII
-#endif
-#endif
-
/* NAND */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -29,7 +29,6 @@
#endif
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 6
/* USB Configs */
@@ -48,7 +48,6 @@
#ifdef CONFIG_CMD_NET
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x1
-#define CONFIG_FEC_XCV_TYPE RMII
#endif
#define CONFIG_FEC_ENET_DEV 1
@@ -17,10 +17,6 @@
# define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* CONFIG_CMD_USB */
-#if IS_ENABLED(CONFIG_FEC_MXC)
-# define CONFIG_FEC_XCV_TYPE RMII
-#endif /* CONFIG_FEC_MXC */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"mmcdev=0\0" \
"mmcpart=2\0" \
@@ -130,7 +130,6 @@
/* Ethernet Configuration */
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 1
/* Framebuffer */
@@ -29,7 +29,6 @@
#define IMX_FEC_BASE ENET2_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x1
-#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_MXC_UART_BASE UART6_BASE_ADDR
@@ -32,7 +32,6 @@
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 1
#define FEC_QUIRK_ENET_MAC
@@ -80,7 +80,6 @@
#ifdef CONFIG_CMD_NET
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x1
-#define CONFIG_FEC_XCV_TYPE RMII
#endif
#endif
@@ -9,8 +9,6 @@
#ifndef __CONFIG_TQMA6_MBA6_H
#define __CONFIG_TQMA6_MBA6_H
-#define CONFIG_FEC_XCV_TYPE RGMII
-
#define CONFIG_FEC_MXC_PHYADDR 0x03
#define CONFIG_MXC_UART_BASE UART2_BASE
@@ -7,7 +7,6 @@
#define __CONFIG_TQMA6_WRU4_H
/* Ethernet */
-#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 0x01
/* UART */
@@ -103,7 +103,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
/* ENET */
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 7
#define FEC_QUIRK_ENET_MAC
#define IMX_FEC_BASE 0x30BE0000
@@ -39,7 +39,6 @@
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 7
#define FEC_QUIRK_ENET_MAC
@@ -24,7 +24,6 @@
#define CONFIG_SYS_FSL_ESDHC_NUM 1
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 0
/* I2C Configs */
@@ -47,8 +47,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0
-#define CONFIG_FEC_XCV_TYPE RMII
-
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
@@ -45,7 +45,6 @@
#define CONFIG_FEC_ENET_DEV 0
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0
-#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_UBOOT_SECTOR_START 0x2
#define CONFIG_UBOOT_SECTOR_COUNT 0x3fe
With all boards now using DM_ETH we determine the value for CONFIG_FEC_XCV_TYPE at run time, except in the case of the default fall-back. Set the fallback directly now. Cc: Fabio Estevam <festevam@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> --- doc/README.fec_mxc | 5 ----- drivers/net/fec_mxc.c | 10 +++------- include/configs/apalis-imx8x.h | 1 - include/configs/aristainetos2.h | 2 -- include/configs/brppt2.h | 1 - include/configs/capricorn-common.h | 3 --- include/configs/cgtqmx8.h | 1 - include/configs/cl-som-imx7.h | 1 - include/configs/cm_fx6.h | 1 - include/configs/dh_imx6.h | 1 - include/configs/imx6_logic.h | 1 - include/configs/imx8mm-cl-iot-gate.h | 1 - include/configs/imx8mm_beacon.h | 1 - include/configs/imx8mm_evk.h | 1 - include/configs/imx8mm_venice.h | 1 - include/configs/imx8mn_beacon.h | 1 - include/configs/imx8mn_var_som.h | 5 ----- include/configs/imx8mn_venice.h | 1 - include/configs/imx8mp_evk.h | 1 - include/configs/imx8mp_rsb3720.h | 1 - include/configs/imx8mq_evk.h | 1 - include/configs/imx8mq_phanbell.h | 1 - include/configs/imx8qm_mek.h | 3 --- include/configs/imx8qm_rom7720.h | 3 --- include/configs/imx8qxp_mek.h | 3 --- include/configs/imx8ulp_evk.h | 1 - include/configs/kontron_pitx_imx8m.h | 1 - include/configs/liteboard.h | 1 - include/configs/m53menlo.h | 1 - include/configs/mx6sxsabreauto.h | 2 -- include/configs/mx6sxsabresd.h | 2 -- include/configs/mx6ul_14x14_evk.h | 2 -- include/configs/mxs.h | 7 ------- include/configs/nitrogen6x.h | 1 - include/configs/npi_imx6ull.h | 1 - include/configs/o4-imx6ull-nano.h | 4 ---- include/configs/pico-imx6.h | 1 - include/configs/pico-imx6ul.h | 1 - include/configs/pico-imx8mq.h | 1 - include/configs/somlabs_visionsom_6ull.h | 1 - include/configs/tqma6_mba6.h | 2 -- include/configs/tqma6_wru4.h | 1 - include/configs/verdin-imx8mm.h | 1 - include/configs/verdin-imx8mp.h | 1 - include/configs/vf610twr.h | 1 - include/configs/vining_2000.h | 2 -- include/configs/xpress.h | 1 - 47 files changed, 3 insertions(+), 84 deletions(-)