| Message ID | 20220228045554.3048-4-hnagalla@ti.com |
|---|---|
| State | Superseded |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | Add ESM driver support for AM64x R5 SPL/U-boot | expand |
Am Mo., 28. Feb. 2022 um 05:56 Uhr schrieb Hari Nagalla <hnagalla@ti.com>: > > On AM64x devices, it is possible to route Main ESM0 error events to MCU > ESM. MCU ESM high error output can trigger the reset logic to reset the > device. So, for these devices we expect two ESM device nodes in the > device tree, one for Main ESM and the another MCU ESM in the device tree. > When these ESM device nodes are properly configired it is possible to > route the Main RTI0 WWDT output to the MCU ESM high ouput through Main > ESM and trigger a device reset when > CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RESET_EN_Z is set to '0'. > > On K3 AM64x devices, the R5 SPL u-boot handles the ESM device node > configurations. > > Signed-off-by: Hari Nagalla <hnagalla@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Am Mo., 28. Feb. 2022 um 05:56 Uhr schrieb Hari Nagalla <hnagalla@ti.com>: > > On AM64x devices, it is possible to route Main ESM0 error events to MCU > ESM. MCU ESM high error output can trigger the reset logic to reset the > device. So, for these devices we expect two ESM device nodes in the > device tree, one for Main ESM and the another MCU ESM in the device tree. > When these ESM device nodes are properly configired it is possible to > route the Main RTI0 WWDT output to the MCU ESM high ouput through Main > ESM and trigger a device reset when > CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RESET_EN_Z is set to '0'. > > On K3 AM64x devices, the R5 SPL u-boot handles the ESM device node > configurations. > > Signed-off-by: Hari Nagalla <hnagalla@ti.com> > --- > arch/arm/mach-k3/am642_init.c | 29 +++++++++++++++++++++++++---- > 1 file changed, 25 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c > index 543dea02bc..f171c1e254 100644 > --- a/arch/arm/mach-k3/am642_init.c > +++ b/arch/arm/mach-k3/am642_init.c > @@ -24,12 +24,22 @@ > #include <dm/root.h> > > #if defined(CONFIG_SPL_BUILD) > +#define MCU_CTRL_MMR0_BASE 0x04500000 > +#define CTRLMMR_MCU_RST_CTRL 0x04518170 > > static void ctrl_mmr_unlock(void) > { > /* Unlock all PADCFG_MMR1 module registers */ > mmr_unlock(PADCFG_MMR1_BASE, 1); > > + /* Unlock all MCU_CTRL_MMR0 module registers */ > + mmr_unlock(MCU_CTRL_MMR0_BASE, 0); > + mmr_unlock(MCU_CTRL_MMR0_BASE, 1); > + mmr_unlock(MCU_CTRL_MMR0_BASE, 2); > + mmr_unlock(MCU_CTRL_MMR0_BASE, 3); > + mmr_unlock(MCU_CTRL_MMR0_BASE, 4); > + mmr_unlock(MCU_CTRL_MMR0_BASE, 6); > + > /* Unlock all CTRL_MMR0 module registers */ > mmr_unlock(CTRL_MMR0_BASE, 0); > mmr_unlock(CTRL_MMR0_BASE, 1); > @@ -37,9 +47,6 @@ static void ctrl_mmr_unlock(void) > mmr_unlock(CTRL_MMR0_BASE, 3); > mmr_unlock(CTRL_MMR0_BASE, 5); > mmr_unlock(CTRL_MMR0_BASE, 6); > - > - /* Unlock all MCU_PADCFG_MMR1 module registers */ > - mmr_unlock(MCU_PADCFG_MMR1_BASE, 1); > } > > /* > @@ -144,7 +151,7 @@ int fdtdec_board_setup(const void *fdt_blob) > > void board_init_f(ulong dummy) > { > -#if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS) > +#if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS) || defined(CONFIG_ESM_K3) > struct udevice *dev; > int ret; > #endif > @@ -194,6 +201,20 @@ void board_init_f(ulong dummy) > /* Output System Firmware version info */ > k3_sysfw_print_ver(); > > +#if defined(CONFIG_ESM_K3) > + /* Probe/configure ESM0 */ > + ret = uclass_get_device_by_name(UCLASS_MISC, "esm@420000", &dev); > + if (ret) > + printf("esm main init failed: %d\n", ret); > + > + /* Probe/configure MCUESM */ > + ret = uclass_get_device_by_name(UCLASS_MISC, "esm@4100000", &dev); > + if (ret) > + printf("esm mcu init failed: %d\n", ret); > + > + enable_mcu_esm_reset(); enable_mcu_esm_reset() is undefined! I think you forgot something in this patch series :(
Am Mo., 7. März 2022 um 12:18 Uhr schrieb Christian Gmeiner <christian.gmeiner@gmail.com>: > > Am Mo., 28. Feb. 2022 um 05:56 Uhr schrieb Hari Nagalla <hnagalla@ti.com>: > > > > On AM64x devices, it is possible to route Main ESM0 error events to MCU > > ESM. MCU ESM high error output can trigger the reset logic to reset the > > device. So, for these devices we expect two ESM device nodes in the > > device tree, one for Main ESM and the another MCU ESM in the device tree. > > When these ESM device nodes are properly configired it is possible to > > route the Main RTI0 WWDT output to the MCU ESM high ouput through Main > > ESM and trigger a device reset when > > CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RESET_EN_Z is set to '0'. > > > > On K3 AM64x devices, the R5 SPL u-boot handles the ESM device node > > configurations. > > > > Signed-off-by: Hari Nagalla <hnagalla@ti.com> > > --- > > arch/arm/mach-k3/am642_init.c | 29 +++++++++++++++++++++++++---- > > 1 file changed, 25 insertions(+), 4 deletions(-) > > > > diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c > > index 543dea02bc..f171c1e254 100644 > > --- a/arch/arm/mach-k3/am642_init.c > > +++ b/arch/arm/mach-k3/am642_init.c > > @@ -24,12 +24,22 @@ > > #include <dm/root.h> > > > > #if defined(CONFIG_SPL_BUILD) > > +#define MCU_CTRL_MMR0_BASE 0x04500000 > > +#define CTRLMMR_MCU_RST_CTRL 0x04518170 > > > > static void ctrl_mmr_unlock(void) > > { > > /* Unlock all PADCFG_MMR1 module registers */ > > mmr_unlock(PADCFG_MMR1_BASE, 1); > > > > + /* Unlock all MCU_CTRL_MMR0 module registers */ > > + mmr_unlock(MCU_CTRL_MMR0_BASE, 0); > > + mmr_unlock(MCU_CTRL_MMR0_BASE, 1); > > + mmr_unlock(MCU_CTRL_MMR0_BASE, 2); > > + mmr_unlock(MCU_CTRL_MMR0_BASE, 3); > > + mmr_unlock(MCU_CTRL_MMR0_BASE, 4); > > + mmr_unlock(MCU_CTRL_MMR0_BASE, 6); > > + > > /* Unlock all CTRL_MMR0 module registers */ > > mmr_unlock(CTRL_MMR0_BASE, 0); > > mmr_unlock(CTRL_MMR0_BASE, 1); > > @@ -37,9 +47,6 @@ static void ctrl_mmr_unlock(void) > > mmr_unlock(CTRL_MMR0_BASE, 3); > > mmr_unlock(CTRL_MMR0_BASE, 5); > > mmr_unlock(CTRL_MMR0_BASE, 6); > > - > > - /* Unlock all MCU_PADCFG_MMR1 module registers */ > > - mmr_unlock(MCU_PADCFG_MMR1_BASE, 1); > > } > > Something like this: #if defined(CONFIG_ESM_K3) static void enable_mcu_esm_reset(void) { /* Set CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RST_EN_Z to '0' (low active) */ u32 stat = readl(CTRLMMR_MCU_RST_CTRL); stat = stat & 0xFFFDFFFF; writel(stat, CTRLMMR_MCU_RST_CTRL); } #endif > > /* > > @@ -144,7 +151,7 @@ int fdtdec_board_setup(const void *fdt_blob) > > > > void board_init_f(ulong dummy) > > { > > -#if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS) > > +#if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS) || defined(CONFIG_ESM_K3) > > struct udevice *dev; > > int ret; > > #endif > > @@ -194,6 +201,20 @@ void board_init_f(ulong dummy) > > /* Output System Firmware version info */ > > k3_sysfw_print_ver(); > > > > +#if defined(CONFIG_ESM_K3) > > + /* Probe/configure ESM0 */ > > + ret = uclass_get_device_by_name(UCLASS_MISC, "esm@420000", &dev); > > + if (ret) > > + printf("esm main init failed: %d\n", ret); > > + > > + /* Probe/configure MCUESM */ > > + ret = uclass_get_device_by_name(UCLASS_MISC, "esm@4100000", &dev); > > + if (ret) > > + printf("esm mcu init failed: %d\n", ret); > > + > > + enable_mcu_esm_reset(); > > enable_mcu_esm_reset() is undefined! I think you forgot something in > this patch series :( Can you send a fixed V3?
diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c index 543dea02bc..f171c1e254 100644 --- a/arch/arm/mach-k3/am642_init.c +++ b/arch/arm/mach-k3/am642_init.c @@ -24,12 +24,22 @@ #include <dm/root.h> #if defined(CONFIG_SPL_BUILD) +#define MCU_CTRL_MMR0_BASE 0x04500000 +#define CTRLMMR_MCU_RST_CTRL 0x04518170 static void ctrl_mmr_unlock(void) { /* Unlock all PADCFG_MMR1 module registers */ mmr_unlock(PADCFG_MMR1_BASE, 1); + /* Unlock all MCU_CTRL_MMR0 module registers */ + mmr_unlock(MCU_CTRL_MMR0_BASE, 0); + mmr_unlock(MCU_CTRL_MMR0_BASE, 1); + mmr_unlock(MCU_CTRL_MMR0_BASE, 2); + mmr_unlock(MCU_CTRL_MMR0_BASE, 3); + mmr_unlock(MCU_CTRL_MMR0_BASE, 4); + mmr_unlock(MCU_CTRL_MMR0_BASE, 6); + /* Unlock all CTRL_MMR0 module registers */ mmr_unlock(CTRL_MMR0_BASE, 0); mmr_unlock(CTRL_MMR0_BASE, 1); @@ -37,9 +47,6 @@ static void ctrl_mmr_unlock(void) mmr_unlock(CTRL_MMR0_BASE, 3); mmr_unlock(CTRL_MMR0_BASE, 5); mmr_unlock(CTRL_MMR0_BASE, 6); - - /* Unlock all MCU_PADCFG_MMR1 module registers */ - mmr_unlock(MCU_PADCFG_MMR1_BASE, 1); } /* @@ -144,7 +151,7 @@ int fdtdec_board_setup(const void *fdt_blob) void board_init_f(ulong dummy) { -#if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS) +#if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS) || defined(CONFIG_ESM_K3) struct udevice *dev; int ret; #endif @@ -194,6 +201,20 @@ void board_init_f(ulong dummy) /* Output System Firmware version info */ k3_sysfw_print_ver(); +#if defined(CONFIG_ESM_K3) + /* Probe/configure ESM0 */ + ret = uclass_get_device_by_name(UCLASS_MISC, "esm@420000", &dev); + if (ret) + printf("esm main init failed: %d\n", ret); + + /* Probe/configure MCUESM */ + ret = uclass_get_device_by_name(UCLASS_MISC, "esm@4100000", &dev); + if (ret) + printf("esm mcu init failed: %d\n", ret); + + enable_mcu_esm_reset(); +#endif + #if defined(CONFIG_K3_AM64_DDRSS) ret = uclass_get_device(UCLASS_RAM, 0, &dev); if (ret)
On AM64x devices, it is possible to route Main ESM0 error events to MCU ESM. MCU ESM high error output can trigger the reset logic to reset the device. So, for these devices we expect two ESM device nodes in the device tree, one for Main ESM and the another MCU ESM in the device tree. When these ESM device nodes are properly configired it is possible to route the Main RTI0 WWDT output to the MCU ESM high ouput through Main ESM and trigger a device reset when CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RESET_EN_Z is set to '0'. On K3 AM64x devices, the R5 SPL u-boot handles the ESM device node configurations. Signed-off-by: Hari Nagalla <hnagalla@ti.com> --- arch/arm/mach-k3/am642_init.c | 29 +++++++++++++++++++++++++---- 1 file changed, 25 insertions(+), 4 deletions(-)