| Message ID | 20220216101845.18638-3-pali@kernel.org |
|---|---|
| State | Accepted |
| Commit | 65375d026a59a79ff2cabf6b4ee26752b8e3b5e3 |
| Delegated to: | Stefan Roese |
| Headers | show |
| Series | arm: mvebu: a37xx: Fix and extend building memory map | expand |
On 2/16/22 11:18, Pali Rohár wrote: > In function build_mem_map() prepare also mapping for CCI-400 and > BootROM windows. > > BootROM window is 1 MB long and by default starts at address 0xfff00000. > A53 AP BootROM is 16 kB long and repeats in this BootROM window 64 times. > RVBAR_EL3 register is set to value 0xffff0000, so by default A53 AP BootROM > is accessed via range 0xffff0000-0xffff3fff. > > CCI-400 window when new TF-A version is used, starts at address 0xfe000000 > and when old TF-A version is used, starts at address 0xd8000000. > > Physical addresses are read directly from mvebu registers, so if TF-A > remaps it in future (again) then it would not cause any issue for U-Boot. > > Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de> Thanks, Stefan > --- > Changes in v2: > * Use SZ_* macros for sizes > * Fix size of BootROM window > * Fix commit message about 1 MB BootROM window vs 16 kB BootROM code > --- > arch/arm/mach-mvebu/armada3700/cpu.c | 23 ++++++++++++++++++++++- > 1 file changed, 22 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/mach-mvebu/armada3700/cpu.c > index 57a811b36ac6..e9bdc181ef02 100644 > --- a/arch/arm/mach-mvebu/armada3700/cpu.c > +++ b/arch/arm/mach-mvebu/armada3700/cpu.c > @@ -13,6 +13,7 @@ > #include <asm/global_data.h> > #include <linux/bitops.h> > #include <linux/libfdt.h> > +#include <linux/sizes.h> > #include <asm/io.h> > #include <asm/system.h> > #include <asm/arch/cpu.h> > @@ -46,8 +47,10 @@ > #define MVEBU_CPU_DEC_WIN_REMAP(w) (MVEBU_CPU_DEC_WIN_CTRL(w) + 0xc) > #define MVEBU_CPU_DEC_WIN_GRANULARITY 16 > #define MVEBU_CPU_DEC_WINS 5 > +#define MVEBU_CPU_DEC_CCI_BASE (MVEBU_CPU_DEC_WIN_REG_BASE + 0xe0) > +#define MVEBU_CPU_DEC_ROM_BASE (MVEBU_CPU_DEC_WIN_REG_BASE + 0xf4) > > -#define MAX_MEM_MAP_REGIONS (MVEBU_CPU_DEC_WINS + 2) > +#define MAX_MEM_MAP_REGIONS (MVEBU_CPU_DEC_WINS + 4) > > #define A3700_PTE_BLOCK_NORMAL \ > (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE) > @@ -110,8 +113,26 @@ static int get_cpu_dec_win(int win, u32 *tgt, u32 *base, u32 *size) > static void build_mem_map(void) > { > int win, region; > + u32 reg; > > region = 1; > + > + /* CCI-400 */ > + reg = readl(MVEBU_CPU_DEC_CCI_BASE); > + mvebu_mem_map[region].phys = reg << 20; > + mvebu_mem_map[region].virt = reg << 20; > + mvebu_mem_map[region].size = SZ_64K; > + mvebu_mem_map[region].attrs = A3700_PTE_BLOCK_DEVICE; > + ++region; > + > + /* AP BootROM */ > + reg = readl(MVEBU_CPU_DEC_ROM_BASE); > + mvebu_mem_map[region].phys = reg << 20; > + mvebu_mem_map[region].virt = reg << 20; > + mvebu_mem_map[region].size = SZ_1M; > + mvebu_mem_map[region].attrs = A3700_PTE_BLOCK_NORMAL; > + ++region; > + > for (win = 0; win < MVEBU_CPU_DEC_WINS; ++win) { > u32 base, tgt, size; > u64 attrs; Viele Grüße, Stefan Roese
diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/mach-mvebu/armada3700/cpu.c index 57a811b36ac6..e9bdc181ef02 100644 --- a/arch/arm/mach-mvebu/armada3700/cpu.c +++ b/arch/arm/mach-mvebu/armada3700/cpu.c @@ -13,6 +13,7 @@ #include <asm/global_data.h> #include <linux/bitops.h> #include <linux/libfdt.h> +#include <linux/sizes.h> #include <asm/io.h> #include <asm/system.h> #include <asm/arch/cpu.h> @@ -46,8 +47,10 @@ #define MVEBU_CPU_DEC_WIN_REMAP(w) (MVEBU_CPU_DEC_WIN_CTRL(w) + 0xc) #define MVEBU_CPU_DEC_WIN_GRANULARITY 16 #define MVEBU_CPU_DEC_WINS 5 +#define MVEBU_CPU_DEC_CCI_BASE (MVEBU_CPU_DEC_WIN_REG_BASE + 0xe0) +#define MVEBU_CPU_DEC_ROM_BASE (MVEBU_CPU_DEC_WIN_REG_BASE + 0xf4) -#define MAX_MEM_MAP_REGIONS (MVEBU_CPU_DEC_WINS + 2) +#define MAX_MEM_MAP_REGIONS (MVEBU_CPU_DEC_WINS + 4) #define A3700_PTE_BLOCK_NORMAL \ (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE) @@ -110,8 +113,26 @@ static int get_cpu_dec_win(int win, u32 *tgt, u32 *base, u32 *size) static void build_mem_map(void) { int win, region; + u32 reg; region = 1; + + /* CCI-400 */ + reg = readl(MVEBU_CPU_DEC_CCI_BASE); + mvebu_mem_map[region].phys = reg << 20; + mvebu_mem_map[region].virt = reg << 20; + mvebu_mem_map[region].size = SZ_64K; + mvebu_mem_map[region].attrs = A3700_PTE_BLOCK_DEVICE; + ++region; + + /* AP BootROM */ + reg = readl(MVEBU_CPU_DEC_ROM_BASE); + mvebu_mem_map[region].phys = reg << 20; + mvebu_mem_map[region].virt = reg << 20; + mvebu_mem_map[region].size = SZ_1M; + mvebu_mem_map[region].attrs = A3700_PTE_BLOCK_NORMAL; + ++region; + for (win = 0; win < MVEBU_CPU_DEC_WINS; ++win) { u32 base, tgt, size; u64 attrs;
In function build_mem_map() prepare also mapping for CCI-400 and BootROM windows. BootROM window is 1 MB long and by default starts at address 0xfff00000. A53 AP BootROM is 16 kB long and repeats in this BootROM window 64 times. RVBAR_EL3 register is set to value 0xffff0000, so by default A53 AP BootROM is accessed via range 0xffff0000-0xffff3fff. CCI-400 window when new TF-A version is used, starts at address 0xfe000000 and when old TF-A version is used, starts at address 0xd8000000. Physical addresses are read directly from mvebu registers, so if TF-A remaps it in future (again) then it would not cause any issue for U-Boot. Signed-off-by: Pali Rohár <pali@kernel.org> --- Changes in v2: * Use SZ_* macros for sizes * Fix size of BootROM window * Fix commit message about 1 MB BootROM window vs 16 kB BootROM code --- arch/arm/mach-mvebu/armada3700/cpu.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-)