Message ID | 20211123174258.276216-2-ariel.dalessandro@collabora.com |
---|---|
State | Superseded |
Delegated to: | Stefano Babic |
Headers | show |
Series | imx8mn-smm-s2/pro: Add iMX8MN BSH SMM S2 boards | expand |
On Tue, Nov 23, 2021 at 2:43 PM Ariel D'Alessandro <ariel.dalessandro@collabora.com> wrote: > > From: Michael Trimarchi <michael@amarulasolutions.com> > > Add regs used by GPMI > > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> > Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h index b800da13a1..14955d1090 100644 --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h @@ -58,6 +58,13 @@ #define SRC_DDRC_RCR_ADDR 0x30391000 #define SRC_DDRC2_RCR_ADDR 0x30391004 +#define APBH_DMA_ARB_BASE_ADDR 0x33000000 +#define APBH_DMA_ARB_END_ADDR 0x33007FFF +#define MXS_APBH_BASE APBH_DMA_ARB_BASE_ADDR + +#define MXS_GPMI_BASE (APBH_DMA_ARB_BASE_ADDR + 0x02000) +#define MXS_BCH_BASE (APBH_DMA_ARB_BASE_ADDR + 0x04000) + #define DDRC_DDR_SS_GPR0 0x3d000000 #define DDRC_IPS_BASE_ADDR(X) (0x3d400000 + ((X) * 0x2000000)) #define DDR_CSD1_BASE_ADDR 0x40000000