Message ID | 20211008195655.46046-8-mr.nuke.me@gmail.com |
---|---|
State | Deferred |
Delegated to: | Tom Rini |
Headers | show
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[98.195.139.126]) by smtp.gmail.com with ESMTPSA id x8sm67409otg.31.2021.10.08.12.57.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Oct 2021 12:57:06 -0700 (PDT) From: Alexandru Gagniuc <mr.nuke.me@gmail.com> To: u-boot@lists.denx.de, uboot-stm32@st-md-mailman.stormreply.com, patrick.delaunay@foss.st.com Cc: Alexandru Gagniuc <mr.nuke.me@gmail.com>, patrice.chotard@foss.st.com, etienne.carriere@linaro.org Subject: [PATCH v3 07/13] arm: stm32mp: bsec: Update OTP shadow registers in SPL Date: Fri, 8 Oct 2021 14:56:49 -0500 Message-Id: <20211008195655.46046-8-mr.nuke.me@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211008195655.46046-1-mr.nuke.me@gmail.com> References: <20211008195655.46046-1-mr.nuke.me@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion <u-boot.lists.denx.de> List-Unsubscribe: <https://lists.denx.de/options/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=unsubscribe> List-Archive: <https://lists.denx.de/pipermail/u-boot/> List-Post: <mailto:u-boot@lists.denx.de> List-Help: <mailto:u-boot-request@lists.denx.de?subject=help> List-Subscribe: <https://lists.denx.de/listinfo/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=subscribe> Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de> X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean |
Series |
stm32mp1: Support falcon mode with OP-TEE payloads
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expand
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diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index fe39bd80cf..41ed5f3cf5 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -503,10 +503,10 @@ static int stm32mp_bsec_probe(struct udevice *dev) /* * update unlocked shadow for OTP cleared by the rom code - * only executed in U-Boot proper when TF-A is not used + * Executed only by FSBL (SPL or TF-A) */ - if (!IS_ENABLED(CONFIG_TFABOOT) && !IS_ENABLED(CONFIG_SPL_BUILD)) { + if (IS_ENABLED(CONFIG_SPL_BUILD)) { plat = dev_get_plat(dev); for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++)
For TFABOOT and SPL_BUILD, stm32mp_bsec_probe() skipped updating the OTP shadow registers. The idea is that we can't access BSEC from the normal world. This is true with TFABOOT. However, in SPL, we are in the secure world, so skipping probe is incorrect. In fact, SPL is not even built when TFABOOT is selected. Thus, do not skip this step for SPL_BUILD. Note that because SPL is now doing this step, we no longer need to do it in u-boot. The new logic is "let the FSBL do it", which is simpler. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> --- arch/arm/mach-stm32mp/bsec.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)