diff mbox series

[3/5] arm: mvebu: msys: Set CONFIG_SYS_TCLK globally

Message ID 20210731122256.6546-4-pali@kernel.org
State Accepted
Commit 7dd26bbff8489da75ea2b80f0ebede03ee05de3c
Delegated to: Stefan Roese
Headers show
Series arm: mvebu: Automatically detect CONFIG_SYS_TCLK | expand

Commit Message

Pali Rohár July 31, 2021, 12:22 p.m. UTC
This mvebu msys platform always uses fixed 200 MHz TCLK. So specify this
CONFIG_SYS_TCLK option in msys section of global file soc.h file instead of
manual configuration in every board file.

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 arch/arm/mach-mvebu/include/mach/soc.h | 2 ++
 include/configs/crs3xx-98dx3236.h      | 1 -
 include/configs/db-xc3-24g4xg.h        | 1 -
 3 files changed, 2 insertions(+), 2 deletions(-)

Comments

Stefan Roese Aug. 2, 2021, 6:34 a.m. UTC | #1
On 31.07.21 14:22, Pali Rohár wrote:
> This mvebu msys platform always uses fixed 200 MHz TCLK. So specify this
> CONFIG_SYS_TCLK option in msys section of global file soc.h file instead of
> manual configuration in every board file.
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

> ---
>   arch/arm/mach-mvebu/include/mach/soc.h | 2 ++
>   include/configs/crs3xx-98dx3236.h      | 1 -
>   include/configs/db-xc3-24g4xg.h        | 1 -
>   3 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
> index eb6906ad8027..e29c0f32c3de 100644
> --- a/arch/arm/mach-mvebu/include/mach/soc.h
> +++ b/arch/arm/mach-mvebu/include/mach/soc.h
> @@ -187,6 +187,8 @@
>   #define BOOT_FROM_NAND		0x1
>   #define BOOT_FROM_UART		0x2
>   #define BOOT_FROM_SPI		0x3
> +
> +#define CONFIG_SYS_TCLK		200000000	/* 200MHz */
>   #else
>   /* SAR values for Armada XP */
>   #define CONFIG_SAR_REG		(MVEBU_REGISTER(0x18230))
> diff --git a/include/configs/crs3xx-98dx3236.h b/include/configs/crs3xx-98dx3236.h
> index e2ba7b81263f..3feaa60edad8 100644
> --- a/include/configs/crs3xx-98dx3236.h
> +++ b/include/configs/crs3xx-98dx3236.h
> @@ -12,7 +12,6 @@
>   
>   #define CONFIG_SYS_BOOTM_LEN	(64 * 1024 * 1024) /* 64 MB */
>   #define CONFIG_SYS_KWD_CONFIG	$(CONFIG_BOARDDIR)/kwbimage.cfg
> -#define CONFIG_SYS_TCLK		200000000	/* 200MHz */
>   
>   /* USB/EHCI configuration */
>   #define CONFIG_EHCI_IS_TDI
> diff --git a/include/configs/db-xc3-24g4xg.h b/include/configs/db-xc3-24g4xg.h
> index 0e9ccd9b4419..f04ae487b76a 100644
> --- a/include/configs/db-xc3-24g4xg.h
> +++ b/include/configs/db-xc3-24g4xg.h
> @@ -11,7 +11,6 @@
>    */
>   
>   #define CONFIG_SYS_KWD_CONFIG	$(CONFIG_BOARDDIR)/kwbimage.cfg
> -#define CONFIG_SYS_TCLK		200000000	/* 200MHz */
>   
>   /* USB/EHCI configuration */
>   #define CONFIG_EHCI_IS_TDI
> 


Viele Grüße,
Stefan
diff mbox series

Patch

diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index eb6906ad8027..e29c0f32c3de 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -187,6 +187,8 @@ 
 #define BOOT_FROM_NAND		0x1
 #define BOOT_FROM_UART		0x2
 #define BOOT_FROM_SPI		0x3
+
+#define CONFIG_SYS_TCLK		200000000	/* 200MHz */
 #else
 /* SAR values for Armada XP */
 #define CONFIG_SAR_REG		(MVEBU_REGISTER(0x18230))
diff --git a/include/configs/crs3xx-98dx3236.h b/include/configs/crs3xx-98dx3236.h
index e2ba7b81263f..3feaa60edad8 100644
--- a/include/configs/crs3xx-98dx3236.h
+++ b/include/configs/crs3xx-98dx3236.h
@@ -12,7 +12,6 @@ 
 
 #define CONFIG_SYS_BOOTM_LEN	(64 * 1024 * 1024) /* 64 MB */
 #define CONFIG_SYS_KWD_CONFIG	$(CONFIG_BOARDDIR)/kwbimage.cfg
-#define CONFIG_SYS_TCLK		200000000	/* 200MHz */
 
 /* USB/EHCI configuration */
 #define CONFIG_EHCI_IS_TDI
diff --git a/include/configs/db-xc3-24g4xg.h b/include/configs/db-xc3-24g4xg.h
index 0e9ccd9b4419..f04ae487b76a 100644
--- a/include/configs/db-xc3-24g4xg.h
+++ b/include/configs/db-xc3-24g4xg.h
@@ -11,7 +11,6 @@ 
  */
 
 #define CONFIG_SYS_KWD_CONFIG	$(CONFIG_BOARDDIR)/kwbimage.cfg
-#define CONFIG_SYS_TCLK		200000000	/* 200MHz */
 
 /* USB/EHCI configuration */
 #define CONFIG_EHCI_IS_TDI