| Message ID | 20210714205300.17424-4-g-tammana@ti.com |
|---|---|
| State | Accepted |
| Commit | fcdf03aab90c5de44611dadf42d0dbf14fc402d0 |
| Delegated to: | Lokesh Vutla |
| Headers | show |
| Series | Add PMIC node for J7200 | expand |
diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts index 6ef92145ef..891e0b6931 100644 --- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts @@ -89,6 +89,13 @@ <&mcu_secproxy 23>; u-boot,dm-spl; }; + + wkup_vtm0: vtm@42040000 { + compatible = "ti,am654-vtm", "ti,j721e-avs"; + reg = <0x0 0x42040000 0x0 0x330>; + power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells = <1>; + }; }; &dmsc {
Add voltage and thermal management (VTM) node. The efuse values for the OPPs are stored under the VTM, and is needed for AVS class 0 support. Signed-off-by: Gowtham Tammana <g-tammana@ti.com> --- v3: resolved merge conflicts arch/arm/dts/k3-j7200-r5-common-proc-board.dts | 7 +++++++ 1 file changed, 7 insertions(+)