From patchwork Thu Jul 8 18:18:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 1502654 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=bfgssveg; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GLPhT2zb9z9sS8 for ; Fri, 9 Jul 2021 04:19:37 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 02057831F7; Thu, 8 Jul 2021 20:19:17 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="bfgssveg"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 2788C831FC; Thu, 8 Jul 2021 20:19:14 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-3.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE autolearn=unavailable autolearn_force=no version=3.4.2 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id ACCF9831D7 for ; Thu, 8 Jul 2021 20:19:08 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: by mail.kernel.org (Postfix) with ESMTPSA id 4EEC361624; Thu, 8 Jul 2021 18:19:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1625768345; bh=/t4lv6rUcI6UaEMLuVav7+0vE0waSBQj3QomRY46AeU=; h=From:To:Cc:Subject:Date:From; b=bfgssveg1cvQvdtJD/SvK4GaOYjpmqOcHY+z9vGKopjsjXyXT7BHpXwClGBLCEu+P TXKnNxv5L6u5stvafOs4JeDc6uzUa6gNAoVRrQUmSaHdLtySphevAMqGTjT0NACp/c 0kxXtE5WB+/prhG8EBXekbC+QWZPgAG89AlYo5FrJ3WUwi6SfQtwm+CVAgPX82FhXp lSaYQXdomjU1INyx9MN8eODxgeRH5EFTgpMtp3ZtnxN11CgwBakjY0KB1b6zBOH7+u h91srBd+32lUVzUlXjDOvSbIG2m4EKD5dJASqNoYB/JOsfKk+8aF2/Y2+N2UWh9K0w HKHsBiNjbEv7A== Received: by pali.im (Postfix) id C69937B5; Thu, 8 Jul 2021 20:19:02 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Stefan Roese , Konstantin Porotchkin Cc: =?utf-8?q?Marek_Beh=C3=BAn?= , u-boot@lists.denx.de Subject: [PATCH 1/3] arm: a37xx: pci: Extend validation for PCIe resources and oubound windows Date: Thu, 8 Jul 2021 20:18:58 +0200 Message-Id: <20210708181900.8047-1-pali@kernel.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Remapped address of PCIe outbound window may have set only bits from the mask. Add additional check that remapped address which is calculated from PCIe bus address specified in DTS file is valid. Remove also useless clearing of low 16 bits in win_mask. As win_size is power of two and is at least 0x10000 it means that it always has zero low 16 bits. Signed-off-by: Pali Rohár Reviewed-by: Konstantin Porotchkin Reviewed-by: Stefan Roese --- drivers/pci/pci-aardvark.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index 96aa039bdc26..77ce9d0c8d87 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -609,21 +609,22 @@ static void pcie_advk_set_ob_region(struct pcie_advk *pcie, int *wins, * match with given mask. * So every PCIe window size must be a power of two and every start * address must be aligned to window size. Minimal size is 64 KiB - * because lower 16 bits of mask must be zero. + * because lower 16 bits of mask must be zero. Remapped address + * may have set only bits from the mask. */ while (*wins < OB_WIN_COUNT && size > 0) { /* Calculate the largest aligned window size */ win_size = (1ULL << (fls64(size) - 1)) | (phys_start ? (1ULL << __ffs64(phys_start)) : 0); win_size = 1ULL << __ffs64(win_size); - if (win_size < 0x10000) + win_mask = ~(win_size - 1); + if (win_size < 0x10000 || (bus_start & ~win_mask)) break; dev_dbg(pcie->dev, "Configuring PCIe window %d: [0x%llx-0x%llx] as 0x%x\n", *wins, (u64)phys_start, (u64)phys_start + win_size, actions); - win_mask = ~(win_size - 1) & ~0xffff; pcie_advk_set_ob_win(pcie, *wins, phys_start, bus_start, win_mask, actions);