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[01/12] Revert "sunxi: spl: remove DMA related settings of the NAND controller"

Message ID 20210625130547.2177920-2-maxime@cerno.tech
State RFC
Delegated to: Andre Przywara
Headers show
Series Random Fixes for the CHIP Pro | expand

Commit Message

Maxime Ripard June 25, 2021, 1:05 p.m. UTC 
This reverts commit 136e32593335e031558a573158b6180fc80b551f.
---
 board/sunxi/board.c | 5 +++++
 1 file changed, 5 insertions(+)
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Patch

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 21651a1bfca4..80c222114f9a 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -395,6 +395,11 @@  static void nand_clock_setup(void)
 #if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I || \
     defined CONFIG_MACH_SUN9I || defined CONFIG_MACH_SUN50I
 	setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0));
+#endif
+#ifdef CONFIG_MACH_SUN9I
+	setbits_le32(&ccm->ahb_gate1, (1 << AHB_GATE_OFFSET_DMA));
+#else
+	setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_DMA));
 #endif
 	setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1);
 }