diff mbox series

[3/5] clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB

Message ID 20210412230335.2249323-4-giulio.benetti@benettiengineering.com
State Superseded
Delegated to: Stefano Babic
Headers show
Series Fix i.MXRT1050 hang on lcdif init and improve DT for mxsfb | expand

Commit Message

Giulio Benetti April 12, 2021, 11:03 p.m. UTC 
Lcd peripheral needs 2 different gates to be enable to work, so let's
introduce the missing one(LCDIF_PIX) and rename the existing one
(LCDIF_APB).

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
 drivers/clk/imx/clk-imxrt1050.c             | 6 ++++--
 include/dt-bindings/clock/imxrt1050-clock.h | 5 +++--
 2 files changed, 7 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
index 594093ee5f..eb6847f865 100644
--- a/drivers/clk/imx/clk-imxrt1050.c
+++ b/drivers/clk/imx/clk-imxrt1050.c
@@ -255,8 +255,10 @@  static int imxrt1050_clk_probe(struct udevice *dev)
 	       imx_clk_gate2("lpuart1", "lpuart_podf", base + 0x7c, 24));
 	clk_dm(IMXRT1050_CLK_SEMC,
 	       imx_clk_gate2("semc", "semc_podf", base + 0x74, 4));
-	clk_dm(IMXRT1050_CLK_LCDIF,
-	       imx_clk_gate2("lcdif", "lcdif_podf", base + 0x74, 10));
+	clk_dm(IMXRT1050_CLK_LCDIF_APB,
+	       imx_clk_gate2("lcdif", "lcdif_podf", base + 0x70, 28));
+	clk_dm(IMXRT1050_CLK_LCDIF_PIX,
+	       imx_clk_gate2("lcdif_pix", "lcdif", base + 0x74, 10));
 
 	struct clk *clk, *clk1;
 
diff --git a/include/dt-bindings/clock/imxrt1050-clock.h b/include/dt-bindings/clock/imxrt1050-clock.h
index c174f90c1a..09b65e5df2 100644
--- a/include/dt-bindings/clock/imxrt1050-clock.h
+++ b/include/dt-bindings/clock/imxrt1050-clock.h
@@ -52,7 +52,7 @@ 
 #define IMXRT1050_CLK_USDHC2			43
 #define IMXRT1050_CLK_LPUART1			44
 #define IMXRT1050_CLK_SEMC			45
-#define IMXRT1050_CLK_LCDIF			46
+#define IMXRT1050_CLK_LCDIF_APB			46
 #define IMXRT1050_CLK_PLL1_ARM			47
 #define IMXRT1050_CLK_PLL2_SYS			48
 #define IMXRT1050_CLK_PLL3_USB_OTG		49
@@ -60,6 +60,7 @@ 
 #define IMXRT1050_CLK_PLL5_VIDEO		51
 #define IMXRT1050_CLK_PLL6_ENET			52
 #define IMXRT1050_CLK_PLL7_USB_HOST		53
-#define IMXRT1050_CLK_END			54
+#define IMXRT1050_CLK_LCDIF_PIX			54
+#define IMXRT1050_CLK_END			55
 
 #endif /* __DT_BINDINGS_CLOCK_IMXRT1050_H */