diff mbox series

[v4,1/5] psci: add v1.0/v1.1 definitions from Linux

Message ID 20210331230156.1850191-2-igor.opaniuk@gmail.com
State Accepted
Commit 2963d606bc6bbaf7b097ec8a42abec7f71339a9d
Delegated to: Tom Rini
Headers show
Series psci: add support for SYSTEM_RESET2 and PSCI_FEATURES | expand

Commit Message

Igor Opaniuk March 31, 2021, 11:01 p.m. UTC 
From: Igor Opaniuk <igor.opaniuk@foundries.io>

Sync and add PSCI API versions 1.0/1.1 definitions from Linux.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
---

 include/linux/psci.h | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

Comments

Tom Rini April 20, 2021, 2:21 p.m. UTC | #1 
On Thu, Apr 01, 2021 at 02:01:52AM +0300, Igor Opaniuk wrote:

> From: Igor Opaniuk <igor.opaniuk@foundries.io>
> 
> Sync and add PSCI API versions 1.0/1.1 definitions from Linux.
> 
> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

Applied to u-boot/master, thanks!
diff mbox series

Patch

diff --git a/include/linux/psci.h b/include/linux/psci.h
index 841dbc8da7..38edde3137 100644
--- a/include/linux/psci.h
+++ b/include/linux/psci.h
@@ -46,6 +46,14 @@ 
 #define PSCI_0_2_FN64_MIGRATE			PSCI_0_2_FN64(5)
 #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU	PSCI_0_2_FN64(7)
 
+#define PSCI_1_0_FN_PSCI_FEATURES		PSCI_0_2_FN(10)
+#define PSCI_1_0_FN_SYSTEM_SUSPEND		PSCI_0_2_FN(14)
+#define PSCI_1_0_FN_SET_SUSPEND_MODE		PSCI_0_2_FN(15)
+#define PSCI_1_1_FN_SYSTEM_RESET2		PSCI_0_2_FN(18)
+
+#define PSCI_1_0_FN64_SYSTEM_SUSPEND		PSCI_0_2_FN64(14)
+#define PSCI_1_1_FN64_SYSTEM_RESET2		PSCI_0_2_FN64(18)
+
 /* PSCI v0.2 power state encoding for CPU_SUSPEND function */
 #define PSCI_0_2_POWER_STATE_ID_MASK		0xffff
 #define PSCI_0_2_POWER_STATE_ID_SHIFT		0
@@ -56,6 +64,13 @@ 
 #define PSCI_0_2_POWER_STATE_AFFL_MASK		\
 				(0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT)
 
+/* PSCI extended power state encoding for CPU_SUSPEND function */
+#define PSCI_1_0_EXT_POWER_STATE_ID_MASK	0xfffffff
+#define PSCI_1_0_EXT_POWER_STATE_ID_SHIFT	0
+#define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT	30
+#define PSCI_1_0_EXT_POWER_STATE_TYPE_MASK	\
+				(0x1 << PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT)
+
 /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
 #define PSCI_0_2_AFFINITY_LEVEL_ON		0
 #define PSCI_0_2_AFFINITY_LEVEL_OFF		1
@@ -75,6 +90,18 @@ 
 		(((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT)
 #define PSCI_VERSION_MINOR(ver)			\
 		((ver) & PSCI_VERSION_MINOR_MASK)
+#define PSCI_VERSION(maj, min)						\
+	((((maj) << PSCI_VERSION_MAJOR_SHIFT) & PSCI_VERSION_MAJOR_MASK) | \
+	 ((min) & PSCI_VERSION_MINOR_MASK))
+
+/* PSCI features decoding (>=1.0) */
+#define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT	1
+#define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK	\
+			(0x1 << PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT)
+
+#define PSCI_1_0_OS_INITIATED			BIT(0)
+#define PSCI_1_0_SUSPEND_MODE_PC		0
+#define PSCI_1_0_SUSPEND_MODE_OSI		1
 
 /* PSCI return values (inclusive of all PSCI versions) */
 #define PSCI_RET_SUCCESS			0
@@ -86,6 +113,7 @@ 
 #define PSCI_RET_INTERNAL_FAILURE		-6
 #define PSCI_RET_NOT_PRESENT			-7
 #define PSCI_RET_DISABLED			-8
+#define PSCI_RET_INVALID_ADDRESS		-9
 
 #ifdef CONFIG_ARM_PSCI_FW
 unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1,