diff mbox series

imx: spl: Use FIELD_GET for bitfield access

Message ID 20210331170949.2096645-1-sean.anderson@seco.com
State Changes Requested
Delegated to: Stefano Babic
Headers show
Series imx: spl: Use FIELD_GET for bitfield access | expand

Commit Message

Sean Anderson March 31, 2021, 5:09 p.m. UTC
This macro clarifies accesses, and eliminates the need to have a
separate shift define.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

 arch/arm/include/asm/mach-imx/sys_proto.h | 5 +----
 arch/arm/mach-imx/spl.c                   | 8 ++++----
 2 files changed, 5 insertions(+), 8 deletions(-)

Comments

Sean Anderson July 22, 2021, 6:40 p.m. UTC | #1
ping?

On 3/31/21 1:09 PM, Sean Anderson wrote:
> This macro clarifies accesses, and eliminates the need to have a
> separate shift define.
> 
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
> 
>   arch/arm/include/asm/mach-imx/sys_proto.h | 5 +----
>   arch/arm/mach-imx/spl.c                   | 8 ++++----
>   2 files changed, 5 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
> index 43eae6d796..796c0f8b52 100644
> --- a/arch/arm/include/asm/mach-imx/sys_proto.h
> +++ b/arch/arm/include/asm/mach-imx/sys_proto.h
> @@ -78,12 +78,9 @@ struct bd_info;
>   #define IMX6_SRC_GPR10_BMODE			BIT(28)
>   #define IMX6_SRC_GPR10_PERSIST_SECONDARY_BOOT	BIT(30)
>   
> -#define IMX6_BMODE_MASK			GENMASK(7, 0)
> -#define	IMX6_BMODE_SHIFT		4
> +#define IMX6_BMODE_MASK			GENMASK(7, 4)
>   #define IMX6_BMODE_EMI_MASK		BIT(3)
> -#define IMX6_BMODE_EMI_SHIFT		3
>   #define IMX6_BMODE_SERIAL_ROM_MASK	GENMASK(26, 24)
> -#define IMX6_BMODE_SERIAL_ROM_SHIFT	24
>   
>   enum imx6_bmode_serial_rom {
>   	IMX6_BMODE_ECSPI1,
> diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
> index 36033d611c..2f3c1afbb9 100644
> --- a/arch/arm/mach-imx/spl.c
> +++ b/arch/arm/mach-imx/spl.c
> @@ -18,6 +18,7 @@
>   #include <spl.h>
>   #include <asm/mach-imx/hab.h>
>   #include <asm/mach-imx/boot_mode.h>
> +#include <linux/bitfield.h>
>   #include <g_dnl.h>
>   #include <linux/libfdt.h>
>   
> @@ -55,11 +56,11 @@ u32 spl_boot_device(void)
>   		return BOOT_DEVICE_BOARD;
>   
>   	/* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
> -	switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
> +	switch (FIELD_GET(IMX6_BMODE_MASK, reg)) {
>   	 /* EIM: See 8.5.1, Table 8-9 */
>   	case IMX6_BMODE_EMI:
>   		/* BOOT_CFG1[3]: NOR/OneNAND Selection */
> -		switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) {
> +		switch (FIELD_GET(IMX6_BMODE_EMI_MASK, reg)) {
>   		case IMX6_BMODE_ONENAND:
>   			return BOOT_DEVICE_ONENAND;
>   		case IMX6_BMODE_NOR:
> @@ -77,8 +78,7 @@ u32 spl_boot_device(void)
>   	/* Serial ROM: See 8.5.5.1, Table 8-22 */
>   	case IMX6_BMODE_SERIAL_ROM:
>   		/* BOOT_CFG4[2:0] */
> -		switch ((reg & IMX6_BMODE_SERIAL_ROM_MASK) >>
> -			IMX6_BMODE_SERIAL_ROM_SHIFT) {
> +		switch (FIELD_GET(IMX6_BMODE_SERIAL_ROM_MASK, reg)) {
>   		case IMX6_BMODE_ECSPI1:
>   		case IMX6_BMODE_ECSPI2:
>   		case IMX6_BMODE_ECSPI3:
>
Fabio Estevam July 22, 2021, 6:44 p.m. UTC | #2
On Wed, Mar 31, 2021 at 2:10 PM Sean Anderson <sean.anderson@seco.com> wrote:
>
> This macro clarifies accesses, and eliminates the need to have a
> separate shift define.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Sean Anderson Oct. 28, 2021, 7:36 p.m. UTC | #3
Hi Marex,

On 7/22/21 2:44 PM, Fabio Estevam wrote:
> On Wed, Mar 31, 2021 at 2:10 PM Sean Anderson <sean.anderson@seco.com> wrote:
>>
>> This macro clarifies accesses, and eliminates the need to have a
>> separate shift define.
>>
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> 
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
> 

Please include this patch in your next PR, as it is assigned to you in patchwork. Thanks,

--Sean
diff mbox series

Patch

diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
index 43eae6d796..796c0f8b52 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -78,12 +78,9 @@  struct bd_info;
 #define IMX6_SRC_GPR10_BMODE			BIT(28)
 #define IMX6_SRC_GPR10_PERSIST_SECONDARY_BOOT	BIT(30)
 
-#define IMX6_BMODE_MASK			GENMASK(7, 0)
-#define	IMX6_BMODE_SHIFT		4
+#define IMX6_BMODE_MASK			GENMASK(7, 4)
 #define IMX6_BMODE_EMI_MASK		BIT(3)
-#define IMX6_BMODE_EMI_SHIFT		3
 #define IMX6_BMODE_SERIAL_ROM_MASK	GENMASK(26, 24)
-#define IMX6_BMODE_SERIAL_ROM_SHIFT	24
 
 enum imx6_bmode_serial_rom {
 	IMX6_BMODE_ECSPI1,
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 36033d611c..2f3c1afbb9 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -18,6 +18,7 @@ 
 #include <spl.h>
 #include <asm/mach-imx/hab.h>
 #include <asm/mach-imx/boot_mode.h>
+#include <linux/bitfield.h>
 #include <g_dnl.h>
 #include <linux/libfdt.h>
 
@@ -55,11 +56,11 @@  u32 spl_boot_device(void)
 		return BOOT_DEVICE_BOARD;
 
 	/* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
-	switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
+	switch (FIELD_GET(IMX6_BMODE_MASK, reg)) {
 	 /* EIM: See 8.5.1, Table 8-9 */
 	case IMX6_BMODE_EMI:
 		/* BOOT_CFG1[3]: NOR/OneNAND Selection */
-		switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) {
+		switch (FIELD_GET(IMX6_BMODE_EMI_MASK, reg)) {
 		case IMX6_BMODE_ONENAND:
 			return BOOT_DEVICE_ONENAND;
 		case IMX6_BMODE_NOR:
@@ -77,8 +78,7 @@  u32 spl_boot_device(void)
 	/* Serial ROM: See 8.5.5.1, Table 8-22 */
 	case IMX6_BMODE_SERIAL_ROM:
 		/* BOOT_CFG4[2:0] */
-		switch ((reg & IMX6_BMODE_SERIAL_ROM_MASK) >>
-			IMX6_BMODE_SERIAL_ROM_SHIFT) {
+		switch (FIELD_GET(IMX6_BMODE_SERIAL_ROM_MASK, reg)) {
 		case IMX6_BMODE_ECSPI1:
 		case IMX6_BMODE_ECSPI2:
 		case IMX6_BMODE_ECSPI3: