diff mbox series

[1/2] spi: nxp-fspi: Add support for IP read only

Message ID 20210322063012.3995485-1-kuldeep.singh@nxp.com
State Superseded
Delegated to: Stefano Babic
Headers show
Series [1/2] spi: nxp-fspi: Add support for IP read only | expand

Commit Message

Kuldeep Singh March 22, 2021, 6:30 a.m. UTC 
Add support for disabling AHB bus and read entire flash contents via IP
bus only. Please note, this enables IP bus read using a quirk which can
be enabled directly in device-type data or in existence of an errata
where AHB bus may need to be disabled.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
---
 drivers/spi/nxp_fspi.c | 24 ++++++++++++++++++++----
 1 file changed, 20 insertions(+), 4 deletions(-)

Comments

Jagan Teki April 19, 2021, 6:46 a.m. UTC | #1 
On Mon, Mar 22, 2021 at 12:00 PM Kuldeep Singh <kuldeep.singh@nxp.com> wrote:
>
> Add support for disabling AHB bus and read entire flash contents via IP
> bus only. Please note, this enables IP bus read using a quirk which can
> be enabled directly in device-type data or in existence of an errata
> where AHB bus may need to be disabled.
>
> Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
> ---

Acked-by: Jagan Teki <jagan@amarulasolutions.com>
diff mbox series

Patch

diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c
index 6c5bad4c2c..e1b3d2d77b 100644
--- a/drivers/spi/nxp_fspi.c
+++ b/drivers/spi/nxp_fspi.c
@@ -304,6 +304,9 @@ 
 #define POLL_TOUT		5000
 #define NXP_FSPI_MAX_CHIPSELECT		4
 
+/* Access flash memory using IP bus only */
+#define FSPI_QUIRK_USE_IP_ONLY		BIT(0)
+
 struct nxp_fspi_devtype_data {
 	unsigned int rxfifo;
 	unsigned int txfifo;
@@ -338,6 +341,11 @@  struct nxp_fspi {
 	const struct nxp_fspi_devtype_data *devtype_data;
 };
 
+static inline int needs_ip_only(struct nxp_fspi *f)
+{
+	return f->devtype_data->quirks & FSPI_QUIRK_USE_IP_ONLY;
+}
+
 /*
  * R/W functions for big- or little-endian registers:
  * The FSPI controller's endianness is independent of
@@ -769,12 +777,14 @@  static int nxp_fspi_exec_op(struct spi_slave *slave,
 
 	nxp_fspi_prepare_lut(f, op);
 	/*
-	 * If we have large chunks of data, we read them through the AHB bus
-	 * by accessing the mapped memory. In all other cases we use
-	 * IP commands to access the flash.
+	 * If we have large chunks of data, we read them through the AHB bus by
+	 * accessing the mapped memory. In all other cases we use IP commands
+	 * to access the flash. Read via AHB bus may be corrupted due to
+	 * existence of an errata and therefore discard AHB read in such cases.
 	 */
 	if (op->data.nbytes > (f->devtype_data->rxfifo - 4) &&
-	    op->data.dir == SPI_MEM_DATA_IN) {
+	    op->data.dir == SPI_MEM_DATA_IN &&
+	    !needs_ip_only(f)) {
 		nxp_fspi_read_ahb(f, op);
 	} else {
 		if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_OUT)
@@ -808,6 +818,12 @@  static int nxp_fspi_adjust_op_size(struct spi_slave *slave,
 			op->data.nbytes = ALIGN_DOWN(op->data.nbytes, 8);
 	}
 
+	/* Limit data bytes to RX FIFO in case of IP read only */
+	if (needs_ip_only(f) &&
+	    op->data.dir == SPI_MEM_DATA_IN &&
+	    op->data.nbytes > f->devtype_data->rxfifo)
+		op->data.nbytes = f->devtype_data->rxfifo;
+
 	return 0;
 }