From patchwork Wed Mar 17 14:14:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1454698 X-Patchwork-Delegate: rfried.dev@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=ioIDpk/l; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4F0sdJ31kDz9sVb for ; Thu, 18 Mar 2021 01:15:48 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C6A44828CB; Wed, 17 Mar 2021 15:14:49 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1615990490; bh=gH/e2n1wx7ApdXkfPIIlje0MNhdO6ysmZeM5RZA2o30=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=ioIDpk/lXuagXzj0G6rNty+xoUBU6pCXFfsN3rCEHRgz3nONyhyNqUWYQKjSICKt+ J/Yw+pG7d1A2fN0I0k42U0ooJzX7/byHlgJktAdewvEaFE1lTcKFYEFOHZMOFl9UjK NTmJlhSIp/rfspPNIxxMOBbTO8fLa+JMUmyrGd4TvSoysaOHqO+RaAPBxMRjHgCfBq O5pn4eRmlqpiuQ9QGtiUt32pEQzWXQInPTf+g+aCDae8a/0kDvfR2JXGcih3r8xwu+ IjKByFbvx8Qg/RiCkA2u/Kx++dGvDDoABN9QJU8DAixyiOn8i5M7Md1POay/eeBj/R Qwrf9E41IEc0g== Received: by phobos.denx.de (Postfix, from userid 109) id EFFDF8289F; Wed, 17 Mar 2021 15:14:32 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-out.m-online.net (mail-out.m-online.net [IPv6:2001:a60:0:28:0:1:25:1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id CF0EF8285A for ; Wed, 17 Mar 2021 15:14:29 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=lukma@denx.de Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 4F0sbn459Zz1rxwn; Wed, 17 Mar 2021 15:14:29 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 4F0sbn3rCCz1r1MR; Wed, 17 Mar 2021 15:14:29 +0100 (CET) Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id 4KiioiajIPpR; Wed, 17 Mar 2021 15:14:28 +0100 (CET) X-Auth-Info: n4FE5xo8DgfmpXvXhCakiikqHXuhd9TFWg/bDxdWv6A= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Wed, 17 Mar 2021 15:14:28 +0100 (CET) From: Lukasz Majewski To: u-boot@lists.denx.de Cc: Lukasz Majewski , Joe Hershberger , Ramon Fried , Simon Glass Subject: [PATCH v1 6/6] net: mv88e61xx: Reset switch PHYs when bootstrapped to !NO_CPU Date: Wed, 17 Mar 2021 15:14:10 +0100 Message-Id: <20210317141410.32152-7-lukma@denx.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210317141410.32152-1-lukma@denx.de> References: <20210317141410.32152-1-lukma@denx.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean Some devices, when configured in bootstrap to 'no cpu' mode require PHY manual reset to get them operational and responding to reading their ID registers. Without this step - the PHYLIB probing will fail. In more details - the bootstrap configuration from switch must be read. The value of CONFIG Data1 (0x71) of Scratch and Misc register is read to check if 'no_cpu' and 'addr4' bits were set. Signed-off-by: Lukasz Majewski Reviewed-by: Ramon Fried --- drivers/net/phy/mv88e61xx.c | 63 +++++++++++++++++++++++++++++++++++-- 1 file changed, 61 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c index 325d5b56135f..1fa821ca162b 100644 --- a/drivers/net/phy/mv88e61xx.c +++ b/drivers/net/phy/mv88e61xx.c @@ -202,6 +202,17 @@ struct mv88e61xx_phy_priv { u8 phy_ctrl1_en_det_width; /* Width of 'EDet' bit field */ u8 phy_ctrl1_en_det_ctrl; /* 'EDet' control value */ u8 direct_access; /* Access switch device directly */ + /* + * Bootstrap configuration: + * + * If addr4 = 1 device is accessible from 0x10 address on MDIO bus. + */ + u8 addr4; + /* + * If no_cpu = 1 switch is automatically setup, otherwise PHY reset is + * required from CPU for normal operation. + */ + u8 no_cpu; }; static inline int smi_cmd(int cmd, int addr, int reg) @@ -1235,6 +1246,33 @@ int phy_mv88e61xx_init(void) return 0; } +static int mv88e61xx_read_bootstrap(struct phy_device *phydev) +{ + struct mv88e61xx_phy_priv *priv = phydev->priv; + struct mii_dev *mdio_bus = priv->mdio_bus; + int val; + + /* mv88e6020 - ID = 0x0200 (REG 3 on non PHY port) */ + if (priv->id == PORT_SWITCH_ID_6020) { + /* Prepare to read scratch and misc register */ + mdio_bus->write(mdio_bus, priv->global2, 0, + 0x1a /*MV_SCRATCH_MISC*/, + (0x71 /*MV_CONFIG_DATA1*/ << 8)); + + val = mdio_bus->read(mdio_bus, priv->global2, 0, + 0x1a /*MV_SCRATCH_MISC*/); + + if (val & (1 << 0)) + priv->no_cpu = 1; + if (val & (1 << 4)) + priv->addr4 = 1; + debug("mv88e6020: no_cpu=%d addr4=%d\n", priv->no_cpu, + priv->addr4); + } + + return 0; +} + /* * Overload weak get_phy_id definition since we need non-standard functions * to read PHY registers @@ -1274,13 +1312,34 @@ int get_phy_id(struct mii_dev *bus, int smi_addr, int devad, u32 *phy_id) if (val < 0) return val; - val = mv88e61xx_phy_read_indirect(&temp_mii, 0, devad, MII_PHYSID1); + mv88e61xx_read_bootstrap(&temp_phy); + + /* + * When switch is configured to work with CPU (i.e. NO_CPU == 0), PHYs + * require reset (to at least single one) to have its registers + * accessible. + */ + if (!temp_priv.no_cpu && temp_priv.id == PORT_SWITCH_ID_6020) { + /* Reset PHY */ + val = mv88e61xx_phy_read_indirect(&temp_mii, temp_phy.addr, + devad, MII_BMCR); + if (val & BMCR_PDOWN) + val &= ~BMCR_PDOWN; + + mv88e61xx_phy_write_indirect(&temp_mii, temp_phy.addr, devad, + MII_BMCR, val); + } + + /* Read PHY_ID */ + val = mv88e61xx_phy_read_indirect(&temp_mii, temp_phy.addr, devad, + MII_PHYSID1); if (val < 0) return -EIO; *phy_id = val << 16; - val = mv88e61xx_phy_read_indirect(&temp_mii, 0, devad, MII_PHYSID2); + val = mv88e61xx_phy_read_indirect(&temp_mii, temp_phy.addr, devad, + MII_PHYSID2); if (val < 0) return -EIO;