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[v4,3/9] Rockchip: video: edp: Change interrupt polarity configuration

Message ID 20210305103307.112947687@rtp-net.org
State Awaiting Upstream
Delegated to: Anatolij Gustschin
Headers show
Series rk3399 (Pinebook pro) EDP support | expand

Commit Message

Arnaud Patard (Rtp) March 5, 2021, 10:27 a.m. UTC
The linux code is setting polarity configuration to 3 but
uboot code is setting it to 1. Change the configuration to match the
linux configuration

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
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Patch

Index: u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
===================================================================
--- u-boot.orig/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
+++ u-boot/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
@@ -297,7 +297,9 @@  check_member(rk3288_edp, pll_reg_5, 0xa0
 
 /* int_ctl */
 #define SOFT_INT_CTRL				(0x1 << 2)
-#define INT_POL					(0x1 << 0)
+#define INT_POL1				(0x1 << 1)
+#define INT_POL0				(0x1 << 0)
+#define INT_POL					(INT_POL0 | INT_POL1)
 
 /* sys_ctl_1 */
 #define DET_STA					(0x1 << 2)