From patchwork Wed Feb 10 17:51:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1439165 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DbS4h2mY3z9sVF for ; Thu, 11 Feb 2021 04:51:48 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 04AD482B84; Wed, 10 Feb 2021 18:51:45 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=konsulko.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id EDE4882B7D; Wed, 10 Feb 2021 18:51:41 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-qt1-f175.google.com (mail-qt1-f175.google.com [209.85.160.175]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 72D5D82B83 for ; Wed, 10 Feb 2021 18:51:34 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=konsulko.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tom.rini@gmail.com Received: by mail-qt1-f175.google.com with SMTP id x3so2155332qti.5 for ; Wed, 10 Feb 2021 09:51:34 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=8IRmKu9q9xMw1vCf5p9iu46UOqtwutN9yxYHSZmWA3I=; b=gXaFclxZRCgdwezSF8vjT2jMQMr6kA+3rpjTDIA35urr7ydihoZ8q8Bn+sgS6K0dkP WStKDzJMhYVTJDDyhAgNZZHSS1cwbr4owFdKlSxJKlGWOEQwCA8INSh9nRaXcVa29tQB dP+ymI7PZQpA+aSyVd3+ZVAEYDuxuKA5bW2/8uu9HWJ/f+wRc3igiHSaUZjJ4Mu2XZip J3EaOQ5075x6peJwgOF5aPRUhCFSY+0SEXJT+8Gzdm9rmUbVnJCUCpQzzWkiDrH1Ud/j LKHLEVigeDFoZGLhdK01XxMLIm+6gQC/YwlB4cf3WgPKv3mRwrnyYzcfHQ8hFkJQfcGH bhtQ== X-Gm-Message-State: AOAM5321z8PPyQtt2lr821MHMtCibT1G0R+3drc6pJ8dfvPa/6l9RYYx PIxSJ2tdN6ZrJv3Xcwbud4tKbm/shA== X-Google-Smtp-Source: ABdhPJyHPk9qYtEoCMayeRbWYTs411H+6ynWivJITS9MVpW8XjHYIO0ofliCPjSPpyitL+S+nrXOGA== X-Received: by 2002:aed:2dc7:: with SMTP id i65mr3918786qtd.76.1612979492365; Wed, 10 Feb 2021 09:51:32 -0800 (PST) Received: from bill-the-cat.lan (2603-6081-7b07-927a-9541-aad2-0c20-3f85.res6.spectrum.com. [2603:6081:7b07:927a:9541:aad2:c20:3f85]) by smtp.gmail.com with ESMTPSA id w28sm1661637qtv.93.2021.02.10.09.51.31 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Feb 2021 09:51:31 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 2/6] sh: Remove r7780mp board Date: Wed, 10 Feb 2021 12:51:22 -0500 Message-Id: <20210210175126.3026-2-trini@konsulko.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210210175126.3026-1-trini@konsulko.com> References: <20210210175126.3026-1-trini@konsulko.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean This board has not been converted to CONFIG_DM by the deadline of v2020.01 and is missing other conversions which depend on this as well. Remove it. Patch-cc: Nobuhiro Iwamatsu Patch-cc: Nobuhiro Iwamatsu Signed-off-by: Tom Rini --- arch/sh/Kconfig | 5 - board/renesas/r7780mp/Kconfig | 12 - board/renesas/r7780mp/MAINTAINERS | 7 - board/renesas/r7780mp/Makefile | 9 - board/renesas/r7780mp/lowlevel_init.S | 356 -------------------------- board/renesas/r7780mp/r7780mp.c | 64 ----- board/renesas/r7780mp/r7780mp.h | 40 --- configs/r7780mp_defconfig | 40 --- doc/arch/sh.rst | 18 -- drivers/net/Makefile | 1 - drivers/net/ax88796.c | 144 ----------- drivers/net/ax88796.h | 66 ----- include/configs/r7780mp.h | 108 -------- 13 files changed, 870 deletions(-) delete mode 100644 board/renesas/r7780mp/Kconfig delete mode 100644 board/renesas/r7780mp/MAINTAINERS delete mode 100644 board/renesas/r7780mp/Makefile delete mode 100644 board/renesas/r7780mp/lowlevel_init.S delete mode 100644 board/renesas/r7780mp/r7780mp.c delete mode 100644 board/renesas/r7780mp/r7780mp.h delete mode 100644 configs/r7780mp_defconfig delete mode 100644 drivers/net/ax88796.c delete mode 100644 drivers/net/ax88796.h delete mode 100644 include/configs/r7780mp.h diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 2cd153fbac0d..2d7525e61db4 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -25,10 +25,6 @@ config TARGET_R2DPLUS bool "Renesas R2D-PLUS" select CPU_SH4 -config TARGET_R7780MP - bool "R7780MP board" - select CPU_SH4A - config TARGET_SH7752EVB bool "SH7752EVB" select CPU_SH4A @@ -56,7 +52,6 @@ config SYS_CPU source "arch/sh/lib/Kconfig" source "board/renesas/r2dplus/Kconfig" -source "board/renesas/r7780mp/Kconfig" source "board/renesas/sh7752evb/Kconfig" source "board/renesas/sh7753evb/Kconfig" source "board/renesas/sh7757lcr/Kconfig" diff --git a/board/renesas/r7780mp/Kconfig b/board/renesas/r7780mp/Kconfig deleted file mode 100644 index 050cc4cc0f6d..000000000000 --- a/board/renesas/r7780mp/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_R7780MP - -config SYS_BOARD - default "r7780mp" - -config SYS_VENDOR - default "renesas" - -config SYS_CONFIG_NAME - default "r7780mp" - -endif diff --git a/board/renesas/r7780mp/MAINTAINERS b/board/renesas/r7780mp/MAINTAINERS deleted file mode 100644 index 56ec21fd32f8..000000000000 --- a/board/renesas/r7780mp/MAINTAINERS +++ /dev/null @@ -1,7 +0,0 @@ -R7780MP BOARD -M: Nobuhiro Iwamatsu -M: Nobuhiro Iwamatsu -S: Maintained -F: board/renesas/r7780mp/ -F: include/configs/r7780mp.h -F: configs/r7780mp_defconfig diff --git a/board/renesas/r7780mp/Makefile b/board/renesas/r7780mp/Makefile deleted file mode 100644 index 0a387db35d29..000000000000 --- a/board/renesas/r7780mp/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2007,2008 Nobuhiro Iwamatsu -# -# board/r7780mp/Makefile -# - -obj-y := r7780mp.o -extra-y += lowlevel_init.o diff --git a/board/renesas/r7780mp/lowlevel_init.S b/board/renesas/r7780mp/lowlevel_init.S deleted file mode 100644 index 7be1a1bf0703..000000000000 --- a/board/renesas/r7780mp/lowlevel_init.S +++ /dev/null @@ -1,356 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2007,2008 Nobuhiro Iwamatsu - * - * u-boot/board/r7780mp/lowlevel_init.S - */ - -#include -#include -#include - -/* - * Board specific low level init code, called _very_ early in the - * startup sequence. Relocation to SDRAM has not happened yet, no - * stack is available, bss section has not been initialised, etc. - * - * (Note: As no stack is available, no subroutines can be called...). - */ - - .global lowlevel_init - - .text - .align 2 - -lowlevel_init: - - write32 CCR_A, CCR_D /* Address of Cache Control Register */ - /* Instruction Cache Invalidate */ - - write32 FRQCR_A, FRQCR_D /* Frequency control register */ - - /* pin_multi_setting */ - write32 BBG_PMMR_A, BBG_PMMR_D_PMSR1 - - write32 BBG_PMSR1_A, BBG_PMSR1_D - - write32 BBG_PMMR_A, BBG_PMMR_D_PMSR2 - - write32 BBG_PMSR2_A, BBG_PMSR2_D - - write32 BBG_PMMR_A, BBG_PMMR_D_PMSR3 - - write32 BBG_PMSR3_A, BBG_PMSR3_D - - write32 BBG_PMMR_A, BBG_PMMR_D_PMSR4 - - write32 BBG_PMSR4_A, BBG_PMSR4_D - - write32 BBG_PMMR_A, BBG_PMMR_D_PMSRG - - write32 BBG_PMSRG_A, BBG_PMSRG_D - - /* cpg_setting */ - write32 FRQCR_A, FRQCR_D - - write32 DLLCSR_A, DLLCSR_D - - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - - /* wait 200us */ - mov.l REPEAT0_R3, r3 - mov #0, r2 -repeat0: - add #1, r2 - cmp/hs r3, r2 - bf repeat0 - nop - - /* bsc_setting */ - write32 MMSELR_A, MMSELR_D - - write32 BCR_A, BCR_D - - write32 CS0BCR_A, CS0BCR_D - - write32 CS1BCR_A, CS1BCR_D - - write32 CS2BCR_A, CS2BCR_D - - write32 CS4BCR_A, CS4BCR_D - - write32 CS5BCR_A, CS5BCR_D - - write32 CS6BCR_A, CS6BCR_D - - write32 CS0WCR_A, CS0WCR_D - - write32 CS1WCR_A, CS1WCR_D - - write32 CS2WCR_A, CS2WCR_D - - write32 CS4WCR_A, CS4WCR_D - - write32 CS5WCR_A, CS5WCR_D - - write32 CS6WCR_A, CS6WCR_D - - write32 CS5PCR_A, CS5PCR_D - - write32 CS6PCR_A, CS6PCR_D - - /* ddr_setting */ - /* wait 200us */ - mov.l REPEAT0_R3, r3 - mov #0, r2 -repeat1: - add #1, r2 - cmp/hs r3, r2 - bf repeat1 - nop - - mov.l MIM_U_A, r0 - mov.l MIM_U_D, r1 - synco - mov.l r1, @r0 - synco - - mov.l MIM_L_A, r0 - mov.l MIM_L_D0, r1 - synco - mov.l r1, @r0 - synco - - mov.l STR_L_A, r0 - mov.l STR_L_D, r1 - synco - mov.l r1, @r0 - synco - - mov.l SDR_L_A, r0 - mov.l SDR_L_D, r1 - synco - mov.l r1, @r0 - synco - - nop - nop - nop - nop - - mov.l SCR_L_A, r0 - mov.l SCR_L_D0, r1 - synco - mov.l r1, @r0 - synco - - mov.l SCR_L_A, r0 - mov.l SCR_L_D1, r1 - synco - mov.l r1, @r0 - synco - - nop - nop - nop - - mov.l EMRS_A, r0 - mov.l EMRS_D, r1 - synco - mov.l r1, @r0 - synco - - nop - nop - nop - - mov.l MRS1_A, r0 - mov.l MRS1_D, r1 - synco - mov.l r1, @r0 - synco - - nop - nop - nop - - mov.l SCR_L_A, r0 - mov.l SCR_L_D2, r1 - synco - mov.l r1, @r0 - synco - - nop - nop - nop - - mov.l SCR_L_A, r0 - mov.l SCR_L_D3, r1 - synco - mov.l r1, @r0 - synco - - nop - nop - nop - - mov.l SCR_L_A, r0 - mov.l SCR_L_D4, r1 - synco - mov.l r1, @r0 - synco - - nop - nop - nop - - mov.l MRS2_A, r0 - mov.l MRS2_D, r1 - synco - mov.l r1, @r0 - synco - - nop - nop - nop - - mov.l SCR_L_A, r0 - mov.l SCR_L_D5, r1 - synco - mov.l r1, @r0 - synco - - /* wait 200us */ - mov.l REPEAT0_R1, r3 - mov #0, r2 -repeat2: - add #1, r2 - cmp/hs r3, r2 - bf repeat2 - - synco - - mov.l MIM_L_A, r0 - mov.l MIM_L_D1, r1 - synco - mov.l r1, @r0 - synco - - rts - nop - .align 4 - -RWTCSR_D_1: .word 0xA507 -RWTCSR_D_2: .word 0xA507 -RWTCNT_D: .word 0x5A00 - .align 2 - -BBG_PMMR_A: .long 0xFF800010 -BBG_PMSR1_A: .long 0xFF800014 -BBG_PMSR2_A: .long 0xFF800018 -BBG_PMSR3_A: .long 0xFF80001C -BBG_PMSR4_A: .long 0xFF800020 -BBG_PMSRG_A: .long 0xFF800024 - -BBG_PMMR_D_PMSR1: .long 0xffffbffd -BBG_PMSR1_D: .long 0x00004002 -BBG_PMMR_D_PMSR2: .long 0xfc21a7ff -BBG_PMSR2_D: .long 0x03de5800 -BBG_PMMR_D_PMSR3: .long 0xfffffff8 -BBG_PMSR3_D: .long 0x00000007 -BBG_PMMR_D_PMSR4: .long 0xdffdfff9 -BBG_PMSR4_D: .long 0x20020006 -BBG_PMMR_D_PMSRG: .long 0xffffffff -BBG_PMSRG_D: .long 0x00000000 - -FRQCR_A: .long FRQCR -DLLCSR_A: .long 0xffc40010 -FRQCR_D: .long 0x40233035 -DLLCSR_D: .long 0x00000000 - -/* for DDR-SDRAM */ -MIM_U_A: .long MIM_1 -MIM_L_A: .long MIM_2 -SCR_U_A: .long SCR_1 -SCR_L_A: .long SCR_2 -STR_U_A: .long STR_1 -STR_L_A: .long STR_2 -SDR_U_A: .long SDR_1 -SDR_L_A: .long SDR_2 - -EMRS_A: .long 0xFEC02000 -MRS1_A: .long 0xFEC00B08 -MRS2_A: .long 0xFEC00308 - -MIM_U_D: .long 0x00004000 -MIM_L_D0: .long 0x03e80009 -MIM_L_D1: .long 0x03e80209 -SCR_L_D0: .long 0x3 -SCR_L_D1: .long 0x2 -SCR_L_D2: .long 0x2 -SCR_L_D3: .long 0x4 -SCR_L_D4: .long 0x4 -SCR_L_D5: .long 0x0 -STR_L_D: .long 0x000f0000 -SDR_L_D: .long 0x00000400 -EMRS_D: .long 0x0 -MRS1_D: .long 0x0 -MRS2_D: .long 0x0 - -/* Cache Controller */ -CCR_A: .long CCR -MMUCR_A: .long MMUCR -RWTCNT_A: .long WTCNT - -CCR_D: .long 0x0000090b -CCR_D_2: .long 0x00000103 -MMUCR_D: .long 0x00000004 -MSTPCR0_D: .long 0x00001001 -MSTPCR2_D: .long 0xffffffff - -/* local Bus State Controller */ -MMSELR_A: .long MMSELR -BCR_A: .long BCR -CS0BCR_A: .long CS0BCR -CS1BCR_A: .long CS1BCR -CS2BCR_A: .long CS2BCR -CS4BCR_A: .long CS4BCR -CS5BCR_A: .long CS5BCR -CS6BCR_A: .long CS6BCR -CS0WCR_A: .long CS0WCR -CS1WCR_A: .long CS1WCR -CS2WCR_A: .long CS2WCR -CS4WCR_A: .long CS4WCR -CS5WCR_A: .long CS5WCR -CS6WCR_A: .long CS6WCR -CS5PCR_A: .long CS5PCR -CS6PCR_A: .long CS6PCR - -MMSELR_D: .long 0xA5A50003 -BCR_D: .long 0x00000000 -CS0BCR_D: .long 0x77777770 -CS1BCR_D: .long 0x77777670 -CS2BCR_D: .long 0x77777770 -CS4BCR_D: .long 0x77777770 -CS5BCR_D: .long 0x77777670 -CS6BCR_D: .long 0x77777770 -CS0WCR_D: .long 0x00020006 -CS1WCR_D: .long 0x00232304 -CS2WCR_D: .long 0x7777770F -CS4WCR_D: .long 0x7777770F -CS5WCR_D: .long 0x00101006 -CS6WCR_D: .long 0x77777703 -CS5PCR_D: .long 0x77000000 -CS6PCR_D: .long 0x77000000 - -REPEAT0_R3: .long 0x00002000 -REPEAT0_R1: .long 0x0000200 diff --git a/board/renesas/r7780mp/r7780mp.c b/board/renesas/r7780mp/r7780mp.c deleted file mode 100644 index 422381ca780b..000000000000 --- a/board/renesas/r7780mp/r7780mp.c +++ /dev/null @@ -1,64 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2007,2008 Nobuhiro Iwamatsu - * Copyright (C) 2008 Yusuke Goda - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include "r7780mp.h" - -int checkboard(void) -{ -#if defined(CONFIG_R7780MP) - puts("BOARD: Renesas Solutions R7780MP\n"); -#else - puts("BOARD: Renesas Solutions R7780RP\n"); -#endif - return 0; -} - -int board_init(void) -{ - /* SCIF Enable */ - writew(0x0, PHCR); - - return 0; -} - -void led_set_state(unsigned short value) -{ - -} - -void ide_set_reset(int idereset) -{ - /* if reset = 1 IDE reset will be asserted */ - if (idereset) { - writew(0x432, FPGA_CFCTL); -#if defined(CONFIG_R7780MP) - writew(inw(FPGA_CFPOW)|0x01, FPGA_CFPOW); -#else - writew(inw(FPGA_CFPOW)|0x02, FPGA_CFPOW); -#endif - writew(0x01, FPGA_CFCDINTCLR); - } -} - -static struct pci_controller hose; -void pci_init_board(void) -{ - pci_sh7780_init(&hose); -} - -int board_eth_init(struct bd_info *bis) -{ - /* return >= 0 if a chip is found, the board's AX88796L is n2k-based */ - return ne2k_register() + pci_eth_init(bis); -} diff --git a/board/renesas/r7780mp/r7780mp.h b/board/renesas/r7780mp/r7780mp.h deleted file mode 100644 index cce66bc4d2a9..000000000000 --- a/board/renesas/r7780mp/r7780mp.h +++ /dev/null @@ -1,40 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2007 Nobuhiro Iwamatsu - * Copyright (C) 2008 Yusuke Goda - * - * u-boot/board/r7780mp/r7780mp.h - */ - -#ifndef _BOARD_R7780MP_R7780MP_H_ -#define _BOARD_R7780MP_R7780MP_H_ - -/* R7780MP's FPGA register map */ -#define FPGA_BASE 0xa4000000 -#define FPGA_IRLMSK (FPGA_BASE + 0x00) -#define FPGA_IRLMON (FPGA_BASE + 0x02) -#define FPGA_IRLPRI1 (FPGA_BASE + 0x04) -#define FPGA_IRLPRI2 (FPGA_BASE + 0x06) -#define FPGA_IRLPRI3 (FPGA_BASE + 0x08) -#define FPGA_IRLPRI4 (FPGA_BASE + 0x0A) -#define FPGA_RSTCTL (FPGA_BASE + 0x0C) -#define FPGA_PCIBD (FPGA_BASE + 0x0E) -#define FPGA_PCICD (FPGA_BASE + 0x10) -#define FPGA_EXTGIO (FPGA_BASE + 0x16) -#define FPGA_IVDRMON (FPGA_BASE + 0x18) -#define FPGA_IVDRCR (FPGA_BASE + 0x1A) -#define FPGA_OBLED (FPGA_BASE + 0x1C) -#define FPGA_OBSW (FPGA_BASE + 0x1E) -#define FPGA_TPCTL (FPGA_BASE + 0x100) -#define FPGA_TPDCKCTL (FPGA_BASE + 0x102) -#define FPGA_TPCLR (FPGA_BASE + 0x104) -#define FPGA_TPXPOS (FPGA_BASE + 0x106) -#define FPGA_TPYPOS (FPGA_BASE + 0x108) -#define FPGA_DBSW (FPGA_BASE + 0x200) -#define FPGA_VERSION (FPGA_BASE + 0x700) -#define FPGA_CFCTL (FPGA_BASE + 0x300) -#define FPGA_CFPOW (FPGA_BASE + 0x302) -#define FPGA_CFCDINTCLR (FPGA_BASE + 0x304) -#define FPGA_PMR (FPGA_BASE + 0x900) - -#endif /* _BOARD_R7780RP_R7780RP_H_ */ diff --git a/configs/r7780mp_defconfig b/configs/r7780mp_defconfig deleted file mode 100644 index ed89aa9dcd63..000000000000 --- a/configs/r7780mp_defconfig +++ /dev/null @@ -1,40 +0,0 @@ -CONFIG_SH=y -CONFIG_SYS_TEXT_BASE=0x0FFC0000 -CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 -CONFIG_TARGET_R7780MP=y -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200" -# CONFIG_CMDLINE_EDITING is not set -# CONFIG_AUTO_COMPLETE is not set -# CONFIG_CMD_BDI is not set -# CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_BOOTD is not set -# CONFIG_CMD_RUN is not set -# CONFIG_CMD_IMI is not set -# CONFIG_CMD_XIMG is not set -# CONFIG_CMD_EDITENV is not set -# CONFIG_CMD_ENV_EXISTS is not set -CONFIG_CMD_IDE=y -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_PCI=y -CONFIG_CMD_SDRAM=y -# CONFIG_CMD_ECHO is not set -# CONFIG_CMD_ITEST is not set -# CONFIG_CMD_SOURCE is not set -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_PING=y -# CONFIG_CMD_SLEEP is not set -CONFIG_CMD_EXT2=y -CONFIG_DOS_PARTITION=y -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_FLASH=y -CONFIG_ENV_ADDR=0xA0040000 -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_PCI=y -CONFIG_SCIF_CONSOLE=y -CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/doc/arch/sh.rst b/doc/arch/sh.rst index 3a3f92dd3e20..3e3759d68b20 100644 --- a/doc/arch/sh.rst +++ b/doc/arch/sh.rst @@ -26,10 +26,6 @@ Renesas SH7722 ^^^^^^^^^^^^^^ This CPU has the SH4AL-DSP core. -Renesas SH7780 -^^^^^^^^^^^^^^ -This CPU has the SH4A core. - Supported Boards ---------------- @@ -67,20 +63,6 @@ Support devices are: - NOR Flash - Marubun PCMCIA -Renesas R7780MP -^^^^^^^^^^^^^^^ -Board specific code is in board/r7780mp -To use this board, type "make r7780mp_config". -Support devices are: - - - SCIF - - DDR-SDRAM - - NOR Flash - - Compact Flash - - ASIX ethernet - - SH7780 PCI bridge - - RTL8110 ethernet - In SuperH, S-record and binary of made u-boot work on the memory. When u-boot is written in the flash, it is necessary to change the address by using 'objcopy':: diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 6712b74a897b..a19511aaa7ba 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -53,7 +53,6 @@ obj-$(CONFIG_MVNETA) += mvneta.o obj-$(CONFIG_MVPP2) += mvpp2.o obj-$(CONFIG_NATSEMI) += natsemi.o obj-$(CONFIG_DRIVER_NE2000) += ne2000.o ne2000_base.o -obj-$(CONFIG_DRIVER_AX88796L) += ax88796.o ne2000_base.o obj-$(CONFIG_NETCONSOLE) += netconsole.o obj-$(CONFIG_NS8382X) += ns8382x.o obj-$(CONFIG_PCH_GBE) += pch_gbe.o diff --git a/drivers/net/ax88796.c b/drivers/net/ax88796.c deleted file mode 100644 index d161f0e09c36..000000000000 --- a/drivers/net/ax88796.c +++ /dev/null @@ -1,144 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (c) 2007 Nobuhiro Iwamatsu - */ -#include -#include -#include "ax88796.h" - -/* - * Set 1 bit data - */ -static void ax88796_bitset(u32 bit) -{ - /* DATA1 */ - if( bit ) - EEDI_HIGH; - else - EEDI_LOW; - - EECLK_LOW; - udelay(1000); - EECLK_HIGH; - udelay(1000); - EEDI_LOW; -} - -/* - * Get 1 bit data - */ -static u8 ax88796_bitget(void) -{ - u8 bit; - - EECLK_LOW; - udelay(1000); - /* DATA */ - bit = EEDO; - EECLK_HIGH; - udelay(1000); - - return bit; -} - -/* - * Send COMMAND to EEPROM - */ -static void ax88796_eep_cmd(u8 cmd) -{ - ax88796_bitset(BIT_DUMMY); - switch(cmd){ - case MAC_EEP_READ: - ax88796_bitset(1); - ax88796_bitset(1); - ax88796_bitset(0); - break; - - case MAC_EEP_WRITE: - ax88796_bitset(1); - ax88796_bitset(0); - ax88796_bitset(1); - break; - - case MAC_EEP_ERACE: - ax88796_bitset(1); - ax88796_bitset(1); - ax88796_bitset(1); - break; - - case MAC_EEP_EWEN: - ax88796_bitset(1); - ax88796_bitset(0); - ax88796_bitset(0); - break; - - case MAC_EEP_EWDS: - ax88796_bitset(1); - ax88796_bitset(0); - ax88796_bitset(0); - break; - default: - break; - } -} - -static void ax88796_eep_setaddr(u16 addr) -{ - int i ; - - for( i = 7 ; i >= 0 ; i-- ) - ax88796_bitset(addr & (1 << i)); -} - -/* - * Get data from EEPROM - */ -static u16 ax88796_eep_getdata(void) -{ - ushort data = 0; - int i; - - ax88796_bitget(); /* DUMMY */ - for( i = 0 ; i < 16 ; i++ ){ - data <<= 1; - data |= ax88796_bitget(); - } - return data; -} - -static void ax88796_mac_read(u8 *buff) -{ - int i ; - u16 data; - u16 addr = 0; - - for( i = 0 ; i < 3; i++ ) - { - EECS_HIGH; - EEDI_LOW; - udelay(1000); - /* READ COMMAND */ - ax88796_eep_cmd(MAC_EEP_READ); - /* ADDRESS */ - ax88796_eep_setaddr(addr++); - /* GET DATA */ - data = ax88796_eep_getdata(); - *buff++ = (uchar)(data & 0xff); - *buff++ = (uchar)((data >> 8) & 0xff); - EECLK_LOW; - EEDI_LOW; - EECS_LOW; - } -} - -int get_prom(u8* mac_addr, u8* base_addr) -{ - u8 prom[32]; - int i; - - ax88796_mac_read(prom); - for (i = 0; i < 6; i++){ - mac_addr[i] = prom[i]; - } - return 1; -} diff --git a/drivers/net/ax88796.h b/drivers/net/ax88796.h deleted file mode 100644 index 510606610662..000000000000 --- a/drivers/net/ax88796.h +++ /dev/null @@ -1,66 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * AX88796L(NE2000) support - * - * (c) 2007 Nobuhiro Iwamatsu - */ - -#ifndef __DRIVERS_AX88796L_H__ -#define __DRIVERS_AX88796L_H__ - -#define DP_DATA (0x10 << 1) -#define START_PG 0x40 /* First page of TX buffer */ -#define START_PG2 0x48 -#define STOP_PG 0x80 /* Last page +1 of RX ring */ -#define TX_PAGES 12 -#define RX_START (START_PG+TX_PAGES) -#define RX_END STOP_PG - -#define AX88796L_BASE_ADDRESS CONFIG_DRIVER_NE2000_BASE -#define AX88796L_BYTE_ACCESS 0x00001000 -#define AX88796L_OFFSET 0x00000400 -#define AX88796L_ADDRESS_BYTE AX88796L_BASE_ADDRESS + \ - AX88796L_BYTE_ACCESS + AX88796L_OFFSET -#define AX88796L_REG_MEMR AX88796L_ADDRESS_BYTE + (0x14<<1) -#define AX88796L_REG_CR AX88796L_ADDRESS_BYTE + (0x00<<1) - -#define AX88796L_CR (*(vu_short *)(AX88796L_REG_CR)) -#define AX88796L_MEMR (*(vu_short *)(AX88796L_REG_MEMR)) - -#define EECS_HIGH (AX88796L_MEMR |= 0x10) -#define EECS_LOW (AX88796L_MEMR &= 0xef) -#define EECLK_HIGH (AX88796L_MEMR |= 0x80) -#define EECLK_LOW (AX88796L_MEMR &= 0x7f) -#define EEDI_HIGH (AX88796L_MEMR |= 0x20) -#define EEDI_LOW (AX88796L_MEMR &= 0xdf) -#define EEDO ((AX88796L_MEMR & 0x40)>>6) - -#define PAGE0_SET (AX88796L_CR &= 0x3f) -#define PAGE1_SET (AX88796L_CR = (AX88796L_CR & 0x3f) | 0x40) - -#define BIT_DUMMY 0 -#define MAC_EEP_READ 1 -#define MAC_EEP_WRITE 2 -#define MAC_EEP_ERACE 3 -#define MAC_EEP_EWEN 4 -#define MAC_EEP_EWDS 5 - -/* R7780MP Specific code */ -#if defined(CONFIG_R7780MP) -#define ISA_OFFSET 0x1400 -#define DP_IN(_b_, _o_, _d_) (_d_) = \ - *( (vu_short *) ((_b_) + ((_o_) * 2) + ISA_OFFSET)) -#define DP_OUT(_b_, _o_, _d_) \ - *((vu_short *)((_b_) + ((_o_) * 2) + ISA_OFFSET)) = (_d_) -#define DP_IN_DATA(_b_, _d_) (_d_) = *( (vu_short *) ((_b_) + ISA_OFFSET)) -#define DP_OUT_DATA(_b_, _d_) *( (vu_short *) ((_b_)+ISA_OFFSET)) = (_d_) -#else -/* Please change for your target boards */ -#define ISA_OFFSET 0x0000 -#define DP_IN(_b_, _o_, _d_) (_d_) = *( (vu_short *)((_b_)+(_o_ )+ISA_OFFSET)) -#define DP_OUT(_b_, _o_, _d_) *((vu_short *)((_b_)+(_o_)+ISA_OFFSET)) = (_d_) -#define DP_IN_DATA(_b_, _d_) (_d_) = *( (vu_short *) ((_b_)+ISA_OFFSET)) -#define DP_OUT_DATA(_b_, _d_) *( (vu_short *) ((_b_)+ISA_OFFSET)) = (_d_) -#endif - -#endif /* __DRIVERS_AX88796L_H__ */ diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h deleted file mode 100644 index 0455b1c2eca6..000000000000 --- a/include/configs/r7780mp.h +++ /dev/null @@ -1,108 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuation settings for the Renesas R7780MP board - * - * Copyright (C) 2007,2008 Nobuhiro Iwamatsu - * Copyright (C) 2008 Yusuke Goda - */ - -#ifndef __R7780RP_H -#define __R7780RP_H - -#define CONFIG_CPU_SH7780 1 -#define CONFIG_R7780MP 1 -#define CONFIG_SYS_R7780MP_OLD_FLASH 1 -#define __LITTLE_ENDIAN__ 1 - -#define CONFIG_DISPLAY_BOARDINFO - -#define CONFIG_CONS_SCIF0 1 - -#define CONFIG_SYS_SDRAM_BASE (0x08000000) -#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) - -#define CONFIG_SYS_PBSIZE 256 - -/* Flash board support */ -#define CONFIG_SYS_FLASH_BASE (0xA0000000) -#ifdef CONFIG_SYS_R7780MP_OLD_FLASH -/* NOR Flash (S29PL127J60TFI130) */ -# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT -# define CONFIG_SYS_MAX_FLASH_BANKS (2) -# define CONFIG_SYS_MAX_FLASH_SECT 270 -# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\ - CONFIG_SYS_FLASH_BASE + 0x100000,\ - CONFIG_SYS_FLASH_BASE + 0x400000,\ - CONFIG_SYS_FLASH_BASE + 0x700000, } -#else /* CONFIG_SYS_R7780MP_OLD_FLASH */ -/* NOR Flash (Spantion S29GL256P) */ -# define CONFIG_SYS_MAX_FLASH_BANKS (1) -# define CONFIG_SYS_MAX_FLASH_SECT 256 -# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } -#endif /* CONFIG_SYS_R7780MP_OLD_FLASH */ - -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) -/* Address of u-boot image in Flash */ -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) -/* Size of DRAM reserved for malloc() use */ -#define CONFIG_SYS_MALLOC_LEN (1204 * 1024) - -#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) -#define CONFIG_SYS_RX_ETH_BUFFER (8) - -#undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE -#undef CONFIG_SYS_FLASH_QUIET_TEST -/* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_EMPTY_INFO - -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 - -/* Board Clock */ -#define CONFIG_SYS_CLK_FREQ 33333333 -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ - -/* PCI Controller */ -#if defined(CONFIG_CMD_PCI) -#define CONFIG_SH4_PCI -#define CONFIG_SH7780_PCI -#define CONFIG_SH7780_PCI_LSR 0x07f00001 -#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE -#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE -#define CONFIG_PCI_SCAN_SHOW 1 -#define __mem_pci - -#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ -#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS -#define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ - -#define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */ -#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS -#define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */ -#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE -#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE -#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE -#endif /* CONFIG_CMD_PCI */ - -#if defined(CONFIG_CMD_NET) -/* AX88796L Support(NE2000 base chip) */ -#define CONFIG_DRIVER_AX88796L -#define CONFIG_DRIVER_NE2000_BASE 0xA4100000 -#endif - -/* Compact flash Support */ -#if defined(CONFIG_IDE) -#define CONFIG_IDE_RESET 1 -#define CONFIG_SYS_PIO_MODE 1 -#define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ -#define CONFIG_SYS_IDE_MAXDEVICE 1 -#define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000 -#define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ -#define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ -#define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ -#define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ -#define CONFIG_IDE_SWAP_IO -#endif /* CONFIG_IDE */ - -#endif /* __R7780RP_H */