diff mbox series

[1/8] stm32mp: update MMU config before the relocation

Message ID 20210205135332.1.Id05ed63c4c424d0307d757026ab2f22621b5481b@changeid
State Accepted
Delegated to: Tom Rini
Headers show
Series | expand

Commit Message

Patrick DELAUNAY Feb. 5, 2021, 12:53 p.m. UTC 
Mark the top of ram, used for relocated U-Boot as a normal memory
(cacheable and executable) to avoid permission access issue when
U-Boot jumps to this relocated code.

When MMU is activated in pre-reloc stage; only the beginning of
DDR is marked executable.

This patch avoids access issue when DACR is correctly managed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
---

 arch/arm/mach-stm32mp/dram_init.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

Comments

Tom Rini March 3, 2021, 7:08 p.m. UTC | #1 
On Fri, Feb 05, 2021 at 01:53:32PM +0100, Patrick Delaunay wrote:

> Mark the top of ram, used for relocated U-Boot as a normal memory
> (cacheable and executable) to avoid permission access issue when
> U-Boot jumps to this relocated code.
> 
> When MMU is activated in pre-reloc stage; only the beginning of
> DDR is marked executable.
> 
> This patch avoids access issue when DACR is correctly managed.
> 
> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

Applied to u-boot/next, thanks!
diff mbox series

Patch

diff --git a/arch/arm/mach-stm32mp/dram_init.c b/arch/arm/mach-stm32mp/dram_init.c
index 32b177bb79..5fc8c6e15d 100644
--- a/arch/arm/mach-stm32mp/dram_init.c
+++ b/arch/arm/mach-stm32mp/dram_init.c
@@ -12,6 +12,7 @@ 
 #include <lmb.h>
 #include <log.h>
 #include <ram.h>
+#include <asm/system.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -40,6 +41,7 @@  int dram_init(void)
 
 ulong board_get_usable_ram_top(ulong total_size)
 {
+	phys_size_t size;
 	phys_addr_t reg;
 	struct lmb lmb;
 
@@ -47,10 +49,13 @@  ulong board_get_usable_ram_top(ulong total_size)
 	lmb_init(&lmb);
 	lmb_add(&lmb, gd->ram_base, gd->ram_size);
 	boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob);
-	reg = lmb_alloc(&lmb, CONFIG_SYS_MALLOC_LEN + total_size, SZ_4K);
+	size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE),
+	reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE);
 
-	if (reg)
-		return ALIGN(reg + CONFIG_SYS_MALLOC_LEN + total_size, SZ_4K);
+	if (!reg)
+		reg = gd->ram_top - size;
 
-	return gd->ram_top;
+	mmu_set_region_dcache_behaviour(reg, size, DCACHE_DEFAULT_OPTION);
+
+	return reg + size;
 }