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[98.195.139.126]) by smtp.gmail.com with ESMTPSA id u126sm498459oig.55.2021.02.03.07.21.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Feb 2021 07:21:17 -0800 (PST) From: Alexandru Gagniuc To: u-boot@lists.denx.de, sjg@chromium.org Cc: Alexandru Gagniuc , trini@konsulko.com, marex@denx.de Subject: [PATCH 5/5] ARM: dts: stm32mp: Add OP-TEE reserved memory to SPL dtb Date: Wed, 3 Feb 2021 09:21:11 -0600 Message-Id: <20210203152111.1972017-5-mr.nuke.me@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210203152111.1972017-1-mr.nuke.me@gmail.com> References: <20210203152111.1972017-1-mr.nuke.me@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Add the "/reserved-memory/optee" node to the SPL devicetree. The purpose is to allow configuring TZC regions when booting OP-TEE. Signed-off-by: Alexandru Gagniuc --- arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi index 6787619290..9c4100c39c 100644 --- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi @@ -30,9 +30,12 @@ }; reserved-memory { + u-boot,dm-pre-reloc; + optee@de000000 { reg = <0xde000000 0x02000000>; no-map; + u-boot,dm-pre-reloc; }; };