| Message ID | 20210131123606.20702-2-bmeng.cn@gmail.com |
|---|---|
| State | Accepted |
| Commit | 85c714d8dcd56f63c2c0ae1b0f6a7e4a96c918a4 |
| Delegated to: | Simon Glass |
| Headers | show |
| Series | Allow booting a 32-bit system with a top memory address beyond 4 GiB | expand |
From: Bin Meng <bin.meng@windriver.com> When testing QEMU RISC-V 'virt' machine with a 2 GiB memory configuration, it was discovered gd->ram_top is assigned to value zero in setup_dest_addr(). While gd->ram_top should not be declared as type `unsigned long`, which will be updated in a future patch, the current logic in board_get_usable_ram_top() can be updated to cover both 64-bit and 32-bit RISC-V. Signed-off-by: Bin Meng <bin.meng@windriver.com> --- (no changes since v1) arch/riscv/cpu/fu540/dram.c | 7 +++---- arch/riscv/cpu/generic/dram.c | 7 +++---- 2 files changed, 6 insertions(+), 8 deletions(-) Applied to u-boot-dm, thanks!
diff --git a/arch/riscv/cpu/fu540/dram.c b/arch/riscv/cpu/fu540/dram.c index 1dc77efeca..259da65a54 100644 --- a/arch/riscv/cpu/fu540/dram.c +++ b/arch/riscv/cpu/fu540/dram.c @@ -22,7 +22,6 @@ int dram_init_banksize(void) ulong board_get_usable_ram_top(ulong total_size) { -#ifdef CONFIG_64BIT /* * Ensure that we run from first 4GB so that all * addresses used by U-Boot are 32bit addresses. @@ -31,8 +30,8 @@ ulong board_get_usable_ram_top(ulong total_size) * devices work fine because DMA mapping APIs will * provide 32bit DMA addresses only. */ - if (gd->ram_top > SZ_4G) - return SZ_4G; -#endif + if (gd->ram_top >= SZ_4G) + return SZ_4G - 1; + return gd->ram_top; } diff --git a/arch/riscv/cpu/generic/dram.c b/arch/riscv/cpu/generic/dram.c index 1dc77efeca..259da65a54 100644 --- a/arch/riscv/cpu/generic/dram.c +++ b/arch/riscv/cpu/generic/dram.c @@ -22,7 +22,6 @@ int dram_init_banksize(void) ulong board_get_usable_ram_top(ulong total_size) { -#ifdef CONFIG_64BIT /* * Ensure that we run from first 4GB so that all * addresses used by U-Boot are 32bit addresses. @@ -31,8 +30,8 @@ ulong board_get_usable_ram_top(ulong total_size) * devices work fine because DMA mapping APIs will * provide 32bit DMA addresses only. */ - if (gd->ram_top > SZ_4G) - return SZ_4G; -#endif + if (gd->ram_top >= SZ_4G) + return SZ_4G - 1; + return gd->ram_top; }