diff mbox series

[05/12] x86: spl: Make moving BSS conditional

Message ID 20210116145343.5.I5a89c49db44a423cb318aa9d88b31e7df36bca98@changeid
State Superseded
Delegated to: Bin Meng
Headers show
Series x86: Minor improvements mostly for image loading | expand

Commit Message

Simon Glass Jan. 16, 2021, 9:53 p.m. UTC 
At present BSS is always placed in SDRAM. If a separate BSS is not in use
this means that BSS doesn't work as expected. Make the setting conditional
on the SEPARATE_BSS option.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 arch/x86/cpu/u-boot-spl.lds | 2 ++
 1 file changed, 2 insertions(+)

Comments

Bin Meng Jan. 21, 2021, 5:35 a.m. UTC | #1 
On Sun, Jan 17, 2021 at 5:54 AM Simon Glass <sjg@chromium.org> wrote:
>
> At present BSS is always placed in SDRAM. If a separate BSS is not in use
> this means that BSS doesn't work as expected. Make the setting conditional
> on the SEPARATE_BSS option.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
>  arch/x86/cpu/u-boot-spl.lds | 2 ++
>  1 file changed, 2 insertions(+)
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff mbox series

Patch

diff --git a/arch/x86/cpu/u-boot-spl.lds b/arch/x86/cpu/u-boot-spl.lds
index e0c70b076b8..03a8c7e496c 100644
--- a/arch/x86/cpu/u-boot-spl.lds
+++ b/arch/x86/cpu/u-boot-spl.lds
@@ -48,7 +48,9 @@  SECTIONS
 
         _image_binary_end = .;
 
+#if CONFIG_IS_ENABLED(SEPARATE_BSS)
 	. = 0x120000;
+#endif
 	.bss (OVERLAY) : {
 		__bss_start = .;
 		*(.bss*)