diff mbox series

pci: Remove CONFIG_PCI_ENUM_ONLY as it's not used (any more)

Message ID 20210112110343.732061-1-sr@denx.de
State Accepted
Delegated to: Tom Rini
Headers show
Series pci: Remove CONFIG_PCI_ENUM_ONLY as it's not used (any more) | expand

Commit Message

Stefan Roese Jan. 12, 2021, 11:03 a.m. UTC 
This patch completely removes CONFIG_PCI_ENUM_ONLY from the PCI code as
it is not configured for any board (any more). With this removal, some
PCI related files get cleaned up a bit.

Additional, dm_pciauto_setup_device() is now static, as it's not
referenced from any code outside of this C file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
---
 README                       |   7 ---
 drivers/pci/pci_auto.c       | 104 ++++++++++++++---------------------
 drivers/pci/pci_auto_old.c   |  18 ------
 scripts/config_whitelist.txt |   1 -
 4 files changed, 41 insertions(+), 89 deletions(-)

Comments

Simon Glass Jan. 13, 2021, 4:10 p.m. UTC | #1 
On Tue, 12 Jan 2021 at 04:03, Stefan Roese <sr@denx.de> wrote:
>
> This patch completely removes CONFIG_PCI_ENUM_ONLY from the PCI code as
> it is not configured for any board (any more). With this removal, some
> PCI related files get cleaned up a bit.
>
> Additional, dm_pciauto_setup_device() is now static, as it's not
> referenced from any code outside of this C file.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Simon Glass <sjg@chromium.org>
> Cc: Bin Meng <bmeng.cn@gmail.com>
> ---
>  README                       |   7 ---
>  drivers/pci/pci_auto.c       | 104 ++++++++++++++---------------------
>  drivers/pci/pci_auto_old.c   |  18 ------
>  scripts/config_whitelist.txt |   1 -
>  4 files changed, 41 insertions(+), 89 deletions(-)
>

Reviewed-by: Simon Glass <sjg@chromium.org>

Yes we handle this at run-time now.
Tom Rini Jan. 28, 2021, 11:57 p.m. UTC | #2 
On Tue, Jan 12, 2021 at 12:03:43PM +0100, Stefan Roese wrote:

> This patch completely removes CONFIG_PCI_ENUM_ONLY from the PCI code as
> it is not configured for any board (any more). With this removal, some
> PCI related files get cleaned up a bit.
> 
> Additional, dm_pciauto_setup_device() is now static, as it's not
> referenced from any code outside of this C file.
> 
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Simon Glass <sjg@chromium.org>
> Cc: Bin Meng <bmeng.cn@gmail.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>

Applied to u-boot/master, thanks!
diff mbox series

Patch

diff --git a/README b/README
index 7b73a1c97321..edadfe98a5f2 100644
--- a/README
+++ b/README
@@ -2777,13 +2777,6 @@  Low Level (hardware related) configuration options:
   CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM:
 		Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM)
 
-- CONFIG_PCI_ENUM_ONLY
-		Only scan through and get the devices on the buses.
-		Don't do any setup work, presumably because someone or
-		something has already done it, and we don't need to do it
-		a second time.	Useful for platforms that are pre-booted
-		by coreboot or similar.
-
 - CONFIG_PCI_INDIRECT_BRIDGE:
 		Enable support for indirect PCI bridges.
 
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index ea202b0e0959..f6130420daa7 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -18,10 +18,10 @@ 
 #define CONFIG_SYS_PCI_CACHE_LINE_SIZE	8
 #endif
 
-void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
-			     struct pci_region *mem,
-			     struct pci_region *prefetch, struct pci_region *io,
-			     bool enum_only)
+static void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
+				    struct pci_region *mem,
+				    struct pci_region *prefetch,
+				    struct pci_region *io)
 {
 	u32 bar_response;
 	pci_size_t bar_size;
@@ -43,8 +43,7 @@  void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
 		int ret = 0;
 
 		/* Tickle the BAR and get the response */
-		if (!enum_only)
-			dm_pci_write_config32(dev, bar, 0xffffffff);
+		dm_pci_write_config32(dev, bar, 0xffffffff);
 		dm_pci_read_config32(dev, bar, &bar_response);
 
 		/* If BAR is not implemented (or invalid) go to the next BAR */
@@ -58,8 +57,7 @@  void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
 			bar_size = bar_response & PCI_BASE_ADDRESS_IO_MASK;
 			bar_size &= ~(bar_size - 1);
 
-			if (!enum_only)
-				bar_res = io;
+			bar_res = io;
 
 			debug("PCI Autoconfig: BAR %d, I/O, size=0x%llx, ",
 			      bar_nr, (unsigned long long)bar_size);
@@ -69,10 +67,7 @@  void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
 				u32 bar_response_upper;
 				u64 bar64;
 
-				if (!enum_only) {
-					dm_pci_write_config32(dev, bar + 4,
-							      0xffffffff);
-				}
+				dm_pci_write_config32(dev, bar + 4, 0xffffffff);
 				dm_pci_read_config32(dev, bar + 4,
 						     &bar_response_upper);
 
@@ -81,33 +76,29 @@  void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
 
 				bar_size = ~(bar64 & PCI_BASE_ADDRESS_MEM_MASK)
 						+ 1;
-				if (!enum_only)
-					found_mem64 = 1;
+				found_mem64 = 1;
 			} else {
 				bar_size = (u32)(~(bar_response &
 						PCI_BASE_ADDRESS_MEM_MASK) + 1);
 			}
-			if (!enum_only) {
-				if (prefetch && (bar_response &
-					    PCI_BASE_ADDRESS_MEM_PREFETCH)) {
-					bar_res = prefetch;
-				} else {
-					bar_res = mem;
-				}
-			}
+
+			if (prefetch &&
+			    (bar_response & PCI_BASE_ADDRESS_MEM_PREFETCH))
+				bar_res = prefetch;
+			else
+				bar_res = mem;
 
 			debug("PCI Autoconfig: BAR %d, %s, size=0x%llx, ",
 			      bar_nr, bar_res == prefetch ? "Prf" : "Mem",
 			      (unsigned long long)bar_size);
 		}
 
-		if (!enum_only) {
-			ret = pciauto_region_allocate(bar_res, bar_size,
-						      &bar_value, found_mem64);
-			if (ret)
-				printf("PCI: Failed autoconfig bar %x\n", bar);
-		}
-		if (!enum_only && !ret) {
+		ret = pciauto_region_allocate(bar_res, bar_size,
+					      &bar_value, found_mem64);
+		if (ret)
+			printf("PCI: Failed autoconfig bar %x\n", bar);
+
+		if (!ret) {
 			/* Write it out and update our limit */
 			dm_pci_write_config32(dev, bar, (u32)bar_value);
 
@@ -135,28 +126,24 @@  void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
 		bar_nr++;
 	}
 
-	if (!enum_only) {
-		/* Configure the expansion ROM address */
-		dm_pci_read_config8(dev, PCI_HEADER_TYPE, &header_type);
-		header_type &= 0x7f;
-		if (header_type != PCI_HEADER_TYPE_CARDBUS) {
-			rom_addr = (header_type == PCI_HEADER_TYPE_NORMAL) ?
-				PCI_ROM_ADDRESS : PCI_ROM_ADDRESS1;
-			dm_pci_write_config32(dev, rom_addr, 0xfffffffe);
-			dm_pci_read_config32(dev, rom_addr, &bar_response);
-			if (bar_response) {
-				bar_size = -(bar_response & ~1);
-				debug("PCI Autoconfig: ROM, size=%#x, ",
-				      (unsigned int)bar_size);
-				if (pciauto_region_allocate(mem, bar_size,
-							    &bar_value,
-							    false) == 0) {
-					dm_pci_write_config32(dev, rom_addr,
-							      bar_value);
-				}
-				cmdstat |= PCI_COMMAND_MEMORY;
-				debug("\n");
+	/* Configure the expansion ROM address */
+	dm_pci_read_config8(dev, PCI_HEADER_TYPE, &header_type);
+	header_type &= 0x7f;
+	if (header_type != PCI_HEADER_TYPE_CARDBUS) {
+		rom_addr = (header_type == PCI_HEADER_TYPE_NORMAL) ?
+			PCI_ROM_ADDRESS : PCI_ROM_ADDRESS1;
+		dm_pci_write_config32(dev, rom_addr, 0xfffffffe);
+		dm_pci_read_config32(dev, rom_addr, &bar_response);
+		if (bar_response) {
+			bar_size = -(bar_response & ~1);
+			debug("PCI Autoconfig: ROM, size=%#x, ",
+			      (unsigned int)bar_size);
+			if (pciauto_region_allocate(mem, bar_size, &bar_value,
+						    false) == 0) {
+				dm_pci_write_config32(dev, rom_addr, bar_value);
 			}
+			cmdstat |= PCI_COMMAND_MEMORY;
+			debug("\n");
 		}
 	}
 
@@ -319,15 +306,10 @@  int dm_pciauto_config_device(struct udevice *dev)
 	struct pci_region *pci_io;
 	unsigned int sub_bus = PCI_BUS(dm_pci_get_bdf(dev));
 	unsigned short class;
-	bool enum_only = false;
 	struct udevice *ctlr = pci_get_controller(dev);
 	struct pci_controller *ctlr_hose = dev_get_uclass_priv(ctlr);
 	int n;
 
-#ifdef CONFIG_PCI_ENUM_ONLY
-	enum_only = true;
-#endif
-
 	pci_mem = ctlr_hose->pci_mem;
 	pci_prefetch = ctlr_hose->pci_prefetch;
 	pci_io = ctlr_hose->pci_io;
@@ -339,8 +321,7 @@  int dm_pciauto_config_device(struct udevice *dev)
 		debug("PCI Autoconfig: Found P2P bridge, device %d\n",
 		      PCI_DEV(dm_pci_get_bdf(dev)));
 
-		dm_pciauto_setup_device(dev, 2, pci_mem, pci_prefetch, pci_io,
-					enum_only);
+		dm_pciauto_setup_device(dev, 2, pci_mem, pci_prefetch, pci_io);
 
 		n = dm_pci_hose_probe_bus(dev);
 		if (n < 0)
@@ -353,8 +334,7 @@  int dm_pciauto_config_device(struct udevice *dev)
 		 * just do a minimal setup of the bridge,
 		 * let the OS take care of the rest
 		 */
-		dm_pciauto_setup_device(dev, 0, pci_mem, pci_prefetch, pci_io,
-					enum_only);
+		dm_pciauto_setup_device(dev, 0, pci_mem, pci_prefetch, pci_io);
 
 		debug("PCI Autoconfig: Found P2CardBus bridge, device %d\n",
 		      PCI_DEV(dm_pci_get_bdf(dev)));
@@ -378,8 +358,7 @@  int dm_pciauto_config_device(struct udevice *dev)
 		 */
 		debug("PCI Autoconfig: Broken bridge found, only minimal config\n");
 		dm_pciauto_setup_device(dev, 0, hose->pci_mem,
-					hose->pci_prefetch, hose->pci_io,
-					enum_only);
+					hose->pci_prefetch, hose->pci_io);
 		break;
 #endif
 
@@ -388,8 +367,7 @@  int dm_pciauto_config_device(struct udevice *dev)
 		/* fall through */
 
 	default:
-		dm_pciauto_setup_device(dev, 6, pci_mem, pci_prefetch, pci_io,
-					enum_only);
+		dm_pciauto_setup_device(dev, 6, pci_mem, pci_prefetch, pci_io);
 		break;
 	}
 
diff --git a/drivers/pci/pci_auto_old.c b/drivers/pci/pci_auto_old.c
index 8b67cfa92b41..c56ff53c4f9f 100644
--- a/drivers/pci/pci_auto_old.c
+++ b/drivers/pci/pci_auto_old.c
@@ -36,13 +36,11 @@  void pciauto_setup_device(struct pci_controller *hose,
 	pci_size_t bar_size;
 	u16 cmdstat = 0;
 	int bar, bar_nr = 0;
-#ifndef CONFIG_PCI_ENUM_ONLY
 	u8 header_type;
 	int rom_addr;
 	pci_addr_t bar_value;
 	struct pci_region *bar_res;
 	int found_mem64 = 0;
-#endif
 	u16 class;
 
 	pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat);
@@ -51,26 +49,20 @@  void pciauto_setup_device(struct pci_controller *hose,
 	for (bar = PCI_BASE_ADDRESS_0;
 		bar < PCI_BASE_ADDRESS_0 + (bars_num * 4); bar += 4) {
 		/* Tickle the BAR and get the response */
-#ifndef CONFIG_PCI_ENUM_ONLY
 		pci_hose_write_config_dword(hose, dev, bar, 0xffffffff);
-#endif
 		pci_hose_read_config_dword(hose, dev, bar, &bar_response);
 
 		/* If BAR is not implemented go to the next BAR */
 		if (!bar_response)
 			continue;
 
-#ifndef CONFIG_PCI_ENUM_ONLY
 		found_mem64 = 0;
-#endif
 
 		/* Check the BAR type and set our address mask */
 		if (bar_response & PCI_BASE_ADDRESS_SPACE) {
 			bar_size = ((~(bar_response & PCI_BASE_ADDRESS_IO_MASK))
 				   & 0xffff) + 1;
-#ifndef CONFIG_PCI_ENUM_ONLY
 			bar_res = io;
-#endif
 
 			debug("PCI Autoconfig: BAR %d, I/O, size=0x%llx, ",
 			      bar_nr, (unsigned long long)bar_size);
@@ -80,23 +72,18 @@  void pciauto_setup_device(struct pci_controller *hose,
 				u32 bar_response_upper;
 				u64 bar64;
 
-#ifndef CONFIG_PCI_ENUM_ONLY
 				pci_hose_write_config_dword(hose, dev, bar + 4,
 					0xffffffff);
-#endif
 				pci_hose_read_config_dword(hose, dev, bar + 4,
 					&bar_response_upper);
 
 				bar64 = ((u64)bar_response_upper << 32) | bar_response;
 
 				bar_size = ~(bar64 & PCI_BASE_ADDRESS_MEM_MASK) + 1;
-#ifndef CONFIG_PCI_ENUM_ONLY
 				found_mem64 = 1;
-#endif
 			} else {
 				bar_size = (u32)(~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1);
 			}
-#ifndef CONFIG_PCI_ENUM_ONLY
 			if (prefetch && (bar_response & PCI_BASE_ADDRESS_MEM_PREFETCH))
 				bar_res = prefetch;
 			else
@@ -105,10 +92,8 @@  void pciauto_setup_device(struct pci_controller *hose,
 			debug("PCI Autoconfig: BAR %d, %s, size=0x%llx, ",
 			      bar_nr, bar_res == prefetch ? "Prf" : "Mem",
 			      (unsigned long long)bar_size);
-#endif
 		}
 
-#ifndef CONFIG_PCI_ENUM_ONLY
 		if (pciauto_region_allocate(bar_res, bar_size,
 					    &bar_value, found_mem64) == 0) {
 			/* Write it out and update our limit */
@@ -129,7 +114,6 @@  void pciauto_setup_device(struct pci_controller *hose,
 			}
 
 		}
-#endif
 		cmdstat |= (bar_response & PCI_BASE_ADDRESS_SPACE) ?
 			PCI_COMMAND_IO : PCI_COMMAND_MEMORY;
 
@@ -138,7 +122,6 @@  void pciauto_setup_device(struct pci_controller *hose,
 		bar_nr++;
 	}
 
-#ifndef CONFIG_PCI_ENUM_ONLY
 	/* Configure the expansion ROM address */
 	pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
 	header_type &= 0x7f;
@@ -160,7 +143,6 @@  void pciauto_setup_device(struct pci_controller *hose,
 			debug("\n");
 		}
 	}
-#endif
 
 	/* PCI_COMMAND_IO must be set for VGA device */
 	pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 55acc38d0679..518d8d75e799 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1222,7 +1222,6 @@  CONFIG_PCI_CLK_FREQ
 CONFIG_PCI_CONFIG_HOST_BRIDGE
 CONFIG_PCI_EHCI_DEVICE
 CONFIG_PCI_EHCI_DEVNO
-CONFIG_PCI_ENUM_ONLY
 CONFIG_PCI_FIXUP_DEV
 CONFIG_PCI_GT64120
 CONFIG_PCI_INDIRECT_BRIDGE