From patchwork Mon Jan 11 20:11:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Jernej_=C5=A0krabec?= X-Patchwork-Id: 1424818 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=siol.net Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DF4ft3qZZz9sWC for ; Tue, 12 Jan 2021 07:14:14 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 9E97582743; Mon, 11 Jan 2021 21:13:00 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=siol.net Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id CC8B482713; Mon, 11 Jan 2021 21:12:55 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW, SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail.siol.net (mailoutvs29.siol.net [185.57.226.220]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 8E5EF8272A for ; Mon, 11 Jan 2021 21:12:52 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=siol.net Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=jernej.skrabec@siol.net Received: from localhost (localhost [127.0.0.1]) by mail.siol.net (Zimbra) with ESMTP id 4DFF2522CC5; Mon, 11 Jan 2021 21:12:52 +0100 (CET) Received: from mail.siol.net ([127.0.0.1]) by localhost (psrvmta12.zcs-production.pri [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id UTgr81xAv6Gp; Mon, 11 Jan 2021 21:12:52 +0100 (CET) Received: from mail.siol.net (localhost [127.0.0.1]) by mail.siol.net (Zimbra) with ESMTPS id 08AE0522CC3; Mon, 11 Jan 2021 21:12:52 +0100 (CET) Received: from kista.localdomain (cpe-86-58-58-53.static.triera.net [86.58.58.53]) (Authenticated sender: 031275009) by mail.siol.net (Zimbra) with ESMTPSA id B3FA6522CC5; Mon, 11 Jan 2021 21:12:49 +0100 (CET) From: Jernej Skrabec To: jagan@amarulasolutions.com, andre.przywara@arm.com Cc: hdegoede@redhat.com, jernej.skrabec@siol.net, lukma@denx.de, hs@denx.de, peng.fan@nxp.com, joe.hershberger@ni.com, jh80.chung@samsung.com, u-boot@lists.denx.de, linux-sunxi@googlegroups.com Subject: [PATCH v2 07/21] sunxi: support loading with SPL > 32KB Date: Mon, 11 Jan 2021 21:11:39 +0100 Message-Id: <20210111201153.1800440-8-jernej.skrabec@siol.net> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210111201153.1800440-1-jernej.skrabec@siol.net> References: <20210111201153.1800440-1-jernej.skrabec@siol.net> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Andre Przywara H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara Signed-off-by: Jernej Skrabec Reviewed-by: Samuel Holland --- arch/arm/mach-sunxi/board.c | 16 ++++++++++++++-- common/spl/Kconfig | 3 ++- 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 7a8b303f233c..8ed9a87c1195 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -277,15 +277,27 @@ uint32_t sunxi_get_boot_device(void) } #ifdef CONFIG_SPL_BUILD +static u32 sunxi_get_spl_size(void) +{ + if (!is_boot0_magic(SPL_ADDR + 4)) /* eGON.BT0 */ + return 0; + + return readl(SPL_ADDR + 0x10); +} + /* * The eGON SPL image can be located at 8KB or at 128KB into an SD card or * an eMMC device. The boot source has bit 4 set in the latter case. * By adding 120KB to the normal offset when booting from a "high" location * we can support both cases. */ -unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc) +unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc, + unsigned long raw_sect) { - unsigned long sector = CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR; + unsigned long spl_size = sunxi_get_spl_size(); + unsigned long sector; + + sector = max(raw_sect, spl_size / 512); switch (sunxi_get_boot_source()) { case SUNXI_BOOTED_FROM_MMC0_HIGH: diff --git a/common/spl/Kconfig b/common/spl/Kconfig index bed715774d81..1ef09e4ad22a 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -316,7 +316,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR hex "Address on the MMC to load U-Boot from" depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR - default 0x50 if ARCH_SUNXI + default 0x40 if ARCH_SUNXI default 0x75 if ARCH_DAVINCI default 0x8a if ARCH_MX6 || ARCH_MX7 default 0x100 if ARCH_UNIPHIER @@ -333,6 +333,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR config SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET hex "U-Boot main hardware partition image offset" depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR + default 0x10 if ARCH_SUNXI default 0x0 help On some platforms SPL location depends on hardware partition. The ROM