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[67.190.101.114]) by smtp.gmail.com with ESMTPSA id n10sm9781962ila.69.2020.12.19.09.40.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Dec 2020 09:40:35 -0800 (PST) From: Simon Glass To: U-Boot Mailing List Cc: Simon Glass , Andy Shevchenko , Bin Meng , Wolfgang Wallner Subject: [PATCH 05/26] x86: apl: Move priv/plat structs to headers Date: Sat, 19 Dec 2020 10:39:57 -0700 Message-Id: <20201219174018.1114146-4-sjg@chromium.org> X-Mailer: git-send-email 2.29.2.684.gfbc64c5ab5-goog In-Reply-To: <20201219174018.1114146-1-sjg@chromium.org> References: <20201219174018.1114146-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them. Signed-off-by: Simon Glass Signed-off-by: Simon Glass --- arch/x86/cpu/apollolake/hostbridge.c | 20 +------------ arch/x86/cpu/apollolake/pmc.c | 8 +----- arch/x86/include/asm/arch-apollolake/gpio.h | 18 ++++++++++++ .../include/asm/arch-apollolake/hostbridge.h | 28 +++++++++++++++++++ arch/x86/include/asm/arch-apollolake/pmc.h | 16 +++++++++++ drivers/pinctrl/intel/pinctrl_apl.c | 12 -------- 6 files changed, 64 insertions(+), 38 deletions(-) create mode 100644 arch/x86/include/asm/arch-apollolake/hostbridge.h create mode 100644 arch/x86/include/asm/arch-apollolake/pmc.h diff --git a/arch/x86/cpu/apollolake/hostbridge.c b/arch/x86/cpu/apollolake/hostbridge.c index 9ec2309d086..9decab7aa33 100644 --- a/arch/x86/cpu/apollolake/hostbridge.c +++ b/arch/x86/cpu/apollolake/hostbridge.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -41,25 +42,6 @@ enum { TOLUD = 0xbc, }; -/** - * struct apl_hostbridge_plat - platform data for hostbridge - * - * @dtplat: Platform data for of-platdata - * @early_pads: Early pad data to set up, each (pad, cfg0, cfg1) - * @early_pads_count: Number of pads to process - * @pciex_region_size: BAR length in bytes - * @bdf: Bus/device/function of hostbridge - */ -struct apl_hostbridge_plat { -#if CONFIG_IS_ENABLED(OF_PLATDATA) - struct dtd_intel_apl_hostbridge dtplat; -#endif - u32 *early_pads; - int early_pads_count; - uint pciex_region_size; - pci_dev_t bdf; -}; - #if CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE) static const struct nhlt_format_config dmic_1ch_formats[] = { /* 48 KHz 16-bits per sample. */ diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c index e033baf1205..e23d38ea072 100644 --- a/arch/x86/cpu/apollolake/pmc.c +++ b/arch/x86/cpu/apollolake/pmc.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -53,13 +54,6 @@ enum { CF9_GLB_RST = 1 << 20, }; -struct apl_pmc_plat { -#if CONFIG_IS_ENABLED(OF_PLATDATA) - struct dtd_intel_apl_pmc dtplat; -#endif - pci_dev_t bdf; -}; - static int apl_pmc_fill_power_state(struct udevice *dev) { struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev); diff --git a/arch/x86/include/asm/arch-apollolake/gpio.h b/arch/x86/include/asm/arch-apollolake/gpio.h index ab5860c0fd0..762160da882 100644 --- a/arch/x86/include/asm/arch-apollolake/gpio.h +++ b/arch/x86/include/asm/arch-apollolake/gpio.h @@ -485,4 +485,22 @@ /* This is needed by ACPI */ #define GPIO_NUM_PAD_CFG_REGS 2 /* DW0, DW1 */ +#ifndef __ASSEMBLY__ + +#include + +/** + * struct apl_gpio_plat - platform data for each device + * + * @dtplat: of-platdata data from C struct + */ +struct apl_gpio_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + /* Put this first since driver model will copy the data here */ + struct dtd_intel_apl_pinctrl dtplat; +#endif +}; + +#endif /* __ASSEMBLY__ */ + #endif /* _ASM_ARCH_GPIO_H_ */ diff --git a/arch/x86/include/asm/arch-apollolake/hostbridge.h b/arch/x86/include/asm/arch-apollolake/hostbridge.h new file mode 100644 index 00000000000..f4dce0d5224 --- /dev/null +++ b/arch/x86/include/asm/arch-apollolake/hostbridge.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Google LLC + */ + +#ifndef _ASM_ARCH_HOSTBRIDGE_H_ +#define _ASM_ARCH_HOSTBRIDGE_H_ + +/** + * struct apl_hostbridge_plat - platform data for hostbridge + * + * @dtplat: Platform data for of-platdata + * @early_pads: Early pad data to set up, each (pad, cfg0, cfg1) + * @early_pads_count: Number of pads to process + * @pciex_region_size: BAR length in bytes + * @bdf: Bus/device/function of hostbridge + */ +struct apl_hostbridge_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_intel_apl_hostbridge dtplat; +#endif + u32 *early_pads; + int early_pads_count; + uint pciex_region_size; + pci_dev_t bdf; +}; + +#endif /* _ASM_ARCH_HOSTBRIDGE_H_ */ diff --git a/arch/x86/include/asm/arch-apollolake/pmc.h b/arch/x86/include/asm/arch-apollolake/pmc.h new file mode 100644 index 00000000000..23ac8fe7e20 --- /dev/null +++ b/arch/x86/include/asm/arch-apollolake/pmc.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Google LLC + */ + +#ifndef ASM_ARCH_PMC_H +#define ASM_ARCH_PMC_H + +struct apl_pmc_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_intel_apl_pmc dtplat; +#endif + pci_dev_t bdf; +}; + +#endif /* ASM_ARCH_PMC_H */ diff --git a/drivers/pinctrl/intel/pinctrl_apl.c b/drivers/pinctrl/intel/pinctrl_apl.c index b512a85f3e6..acaa55d2e7f 100644 --- a/drivers/pinctrl/intel/pinctrl_apl.c +++ b/drivers/pinctrl/intel/pinctrl_apl.c @@ -17,18 +17,6 @@ #include #include -/** - * struct apl_gpio_plat - platform data for each device - * - * @dtplat: of-platdata data from C struct - */ -struct apl_gpio_plat { -#if CONFIG_IS_ENABLED(OF_PLATDATA) - /* Put this first since driver model will copy the data here */ - struct dtd_intel_apl_pinctrl dtplat; -#endif -}; - static const struct reset_mapping rst_map[] = { { .logical = PAD_CFG0_LOGICAL_RESET_PWROK, .chipset = 0U << 30 }, { .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30 },