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Mon, 7 Dec 2020 01:36:15 +0000 (UTC) Received: from dreyauc.ausil.us (ovpn-112-157.phx2.redhat.com [10.3.112.157]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D8AC7614EB; Mon, 7 Dec 2020 01:36:14 +0000 (UTC) From: dgilmore@redhat.com To: u-boot@lists.denx.de Cc: trini@konsulko.com, baruch@tkos.co.il, sr@denx.de, aford173@gmail.com, miquel.raynal@bootlin.com, Dennis Gilmore Subject: [PATCH 4/4] ARM: mvebu: fixup building a SPI image for db-mv784mp-gp Date: Sun, 6 Dec 2020 19:36:03 -0600 Message-Id: <20201207013603.330578-4-dgilmore@redhat.com> In-Reply-To: <20201207013603.330578-1-dgilmore@redhat.com> References: <20201207013603.330578-1-dgilmore@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=dgilmore@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean From: Dennis Gilmore sync config options from clearfog to db-mv784mp-gp to enable building a SPI image Signed-off-by: Dennis Gilmore --- include/configs/db-mv784mp-gp.h | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 3e20516e94..79ee5909d5 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -78,8 +78,17 @@ #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) +#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI) /* SPL related SPI defines */ -#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS +#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS +#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA) +/* SPL related MMC defines */ +#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) +#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS +#ifdef CONFIG_SPL_BUILD +#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ +#endif +#endif /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ #define CONFIG_SPD_EEPROM 0x4e